Switched capacitor amplifier
AssigneeSeiko Instruments Inc.
InventorToshiyuki Uchida
Life of this patent
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Abstract
Provided is a switched capacitor amplifier capable of outputting a stable output voltage. The switched capacitor amplifier is capable of operating so as to eliminate a charge/discharge time difference between an input capacitor (18) and an output capacitor (19). Accordingly, in a shift from a hold state to a sample state, for example, even if one terminal voltage (V2) of the output capacitor (19) abruptly increases to an output voltage (VOUT), another terminal voltage (Vs) of the output capacitor (19) does not increase abruptly. In other words, an input voltage to an internal amplifier (11) does not increase abruptly. Therefore, an output voltage of the internal amplifier (11) becomes stable and accordingly the output voltage (VOUT) becomes stable as well.
Claims3
A switched capacitor amplifier, comprising:
- an input capacitor;
- an input switch between an input terminal of the switched capacitor amplifier and the input capacitor;
- a first reference voltage switch coupled to the input capacitor;
- an output capacitor having a capacitance smaller than a capacitance of the input capacitor;
- an output switch between the output capacitor and an output terminal of the switched capacitor amplifier;
- an internal amplifier that amplifies an input voltage at a capacitance ratio between the input capacitor and the output capacitor, to generate an output voltage;
- a storage capacitor that stores charges based on the output voltage;
- and
- a control circuit that generates a first clock signal that controls the first reference voltage switch, a second clock signal that controls the input switch and a third clock signal that controls the output switch, such that during sampling, the reference voltage switch is OFF, the input switch is ON, and the output switch is turned ON following a predetermined time period after the input switch is turned ON.
Dependencies are inferred from the claim text.