Self-reconfigurable memristor-based analog resonant computer
AssigneeThe United States of America as represented by the Secretary of the Air Force
InventorsRobinson E. Pino, James W. Bohl
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Abstract
An apparatus which provides a self-reconfigurable analog resonant computer employing a fixed electronic circuit schematic which performs computing logic operations (for example OR, AND, NOR, and XOR Boolean logic) without physical re-wiring and whose components only include passive circuit elements such as resistors, capacitors, inductors, and memristor devices. The computational logic self-reconfiguration process in the circuit takes place as training input signals, which are input causing the impedance state of the memristor device to change. Once the training process is completed, the circuit is probed to determine whether the desired logic operation has been programmed.
Claims8
A reconfigurable electronic logic circuit, comprising:
- a first input;
- a second input
- an output;
- a voltage divider network comprising at least one programmable resistance;
- and
- at least one resonant subcircuit;
- wherein when voltage signals are input into either or both said first input and said second input, said electronic logic circuit will produce a resonant signal at said output which, when the peak voltage thereof exceeds a predetermined value, it is considered a logical “1”, and considered a logical “0”, otherwise, so as to perform a logic function on said input voltage signals.
A reconfigurable computing circuit comprising the following circuit elements so arranged and interconnected:
- a first signal input connected to a first terminal of a first resistance;
- a second terminal of said first resistance connected to a first terminal of a first inductance;
- a first terminal of a capacitance connected to a second terminal of said first inductance;
- a second terminal of said first capacitance connected to a first terminal of a first memrisistance;
- a second terminal of said first memresistance connected to a circuit ground;
- a first terminal of a second capacitance connected to said first terminal of said first memresistance and said second terminal of said first capacitance;
- a second terminal of said second capacitance connected to a circuit ground;
- a first terminal of a second resistance connected to said second terminal of said first inductance and said first terminal of said first capacitance;
- a second terminal of said second resistance connected to a first terminal of a second memresistance and a first terminal of a third resistance;
- a second terminal of said second memresistance connected to a circuit ground;
- a second terminal of said third resistance connected to a second terminal of a third capacitance, a first terminal of a second inductance, and a signal output;
- a first terminal of said third capacitance connected to a second signal input;
- and a second terminal of said second inductance connected to a circuit ground;
- wherein, when voltage signals are input into either or both said first signal input and said second signal input, said electronic logic circuit will perform a logical operation on said voltage signals so as to produce a resonant signal at said signal output which, when the peak voltage thereof exceeds a predetermined value, it is considered a logical “1”, and considered a logical “0”, otherwise, so as to perform a logic function on said input voltage signals.
Dependencies are inferred from the claim text.