Power transistor with improved high-side operating characteristics and reduced resistance and related apparatus and method

An apparatus comprising:

• a semiconductor-on-insulator structure comprising:
• a substrate;
• a field plate;
• a buried layer between the substrate and the field plate;
• and
• a dielectric layer between the field plate and the buried layer;
• and
• a transistor device at least partially formed in the substrate, the transistor device comprising a source region, a drain region, and a drift region in the substrate;
• and
• at least one plug through the dielectric layer, the buried layer, and the substrate, the at least one plug configured to electrically couple the field plate to the source region of the transistor device;
• wherein the transistor device has a breakdown voltage of at least 600 V;
• also wherein the dielectric layer has a thickness of approximately 4 μm;
• and
• the buried layer has a thickness between approximately 0.4 μm and approximately 1 μm;
• also wherein the field plate extends along at least 40% of a length of the transistor device.