Field effect transistor, logic circuit including the same and methods of manufacturing the same

A field effect transistor comprising:

• an ambipolar layer including a source region, a drain region, and a channel region between the source region and the drain region, wherein the source region, the drain region, and the channel region are formed in a monolithic structure;
• a gate electrode on the channel region;
• and
• an insulating layer separating the gate electrode from the ambipolar layer,
• wherein the source region and the drain region have a width greater than that of the channel region in a second direction that crosses a first direction in which the source region and the drain region are connected to each other, and
• wherein the gate electrode is a single gate electrode formed closer to the drain region than the source region so that the field effect transistor is of a p type.

A field effect transistor comprising:

• an ambipolar layer including a source region, a drain region, and a channel region between the source region and the drain region, wherein the source region, the drain region, and the channel region are formed in a monolithic structure:
• a gate electrode on the channel region;
• and
• an insulating layer separating the gate electrode from the ambipolar layer,
• wherein the source region and the drain region have a width greater than that of the channel region in a second direction that crosses a first direction in which the source region and the drain region are connected to each other,
• wherein the gate electrode includes first and second gate electrodes formed above the channel region, the first gate electrode formed closer to the source region than the drain region and the second gate electrode formed closer to the drain region than the source region, and
• wherein when a voltage is selectively applied to the first gate electrode or the second gate electrode, the field effect transistor is of an n type or of a p type, respectively.