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US 8,274,073 B2Granted
Memory device with improved switching speed and data retention
AssigneeSpansion LLC
InventorsJuri Krieger, Stuart Spitzer
Life of this patent
Estimating the term…
Abstract
The present memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the passive layer and the second electrode. In undertaking an operation on the memory device, ions moves into within and from within the active layer, and the active layer is oriented so that the atoms of the active layer provide minimum obstruction to the movement of the ions into, within and from the active layer.
Claims22
An electronic device comprising:
- first and second electrodes;
- a layer between the first and second electrodes, and having a plurality of associated elements;
- wherein in undertaking an operation on the electronic device, a charged species moves within the layer in a general direction oriented from the first electrode to the second electrode;
- the layer being oriented so that the elements of the layer provide minimum obstruction to the movement of the charged species within the layer wherein the layer includes channels in a lattice structure that are oriented to run in the <100> direction from the first electrode to the second electrode.
1 more element
A memory device comprising:
- first and second electrodes;
- a passive layer between the first and second electrodes;
- an active layer between the passive layer and the second electrode, and having a plurality of associated elements;
- wherein in undertaking an operation on the memory device, a charged species moves within the active layer in a general direction away from one electrode and toward the other electrode;
- the active layer being oriented so that the elements of the active layer provide minimum obstruction to the movement of the charged species within the active layer wherein the active layer includes channels in a lattice structure that are oriented to run in the <100> direction from the first electrode to the second electrode.
2 more elements
A memory device comprising:
- first and second electrodes;
- a passive layer between the first and second electrodes;
- an active layer between the passive layer and the second electrode, and having a plurality of associated elements;
- wherein in programming the memory device, a charged species moves from the passive layer into and within the active layer in a general direction toward the second electrode;
- the active layer being oriented so that the elements of the active layer provide minimum obstruction to the movement of the charged species wherein the active layer includes channels in a lattice structure that are oriented to run in the <100> direction from the first electrode to the second electrode.
2 more elements
A memory device comprising:
- first and second electrodes;
- a passive layer between the first and second electrodes;
- an active layer between the passive layer and the second electrode, and having a plurality of associated elements;
- wherein in erasing the memory device, a charged species moves within and from the active layer into the passive layer in a general direction toward the first electrode;
- the active layer being oriented so that the elements of the active layer provide minimum obstruction to the movement of the charged species within and from the active layer and into the passive layer wherein the active layer includes channels in a lattice structure that are oriented to run in the <100> direction from the first electrode to the second electrode.
2 more elements
Dependencies are inferred from the claim text.