Integrated circuit package system with integration port
AssigneeSTATS ChipPAC, Ltd.
InventorsHenry Descalzo Bathan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho, Jose Alvin Caparas
Life of this patent
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Abstract
An integrated circuit package system comprising: fabricating a package base including: forming a lead frame, coupling a first integrated circuit device under the lead frame, coupling a second integrated circuit device over the first integrated circuit device, and molding an enclosure on the lead frame, the first integrated circuit device, and the second integrated circuit device for forming an integration port; and coupling a third integrated circuit device on the integration port.
Claims20
A method of manufacture of an integrated circuit package system comprising:
- fabricating a package base including:
- forming a lead frame,
- coupling a first integrated circuit device under the lead frame,
- coupling an extended integration substrate, having a substrate bottom, to the lead frame with a chip interconnect, the chip interconnect vertically extended between the extended integration substrate and the lead frame,
- attaching a side of a second integrated circuit device to the substrate bottom with an adhesive, the adhesive fully covering the side, and
- molding an enclosure on the lead frame, the extended integration substrate, the first integrated circuit device, and the second integrated circuit device for forming an integration port, the integration port fully above the lead frame and exposed from the enclosure;
- and
- coupling a third integrated circuit device on the integration port.
A method of manufacture of an integrated circuit package system comprising:
- fabricating a package base including:
- forming a lead frame having coplanar contacts and integration contacts,
- coupling a first integrated circuit device under the lead frame including coupling a chip interconnect between the lead frame and the first integrated circuit device,
- coupling an extended integration substrate. having a substrate bottom, to the lead frame with the chip interconnect, the chip interconnect vertically extended between the extended integration substrate and the lead frame,
- attaching a side of a second integrated circuit device to the substrate bottom with an adhesive, the adhesive fully covering the side, and
- molding an enclosure on the lead frame, the extended integration substrate, the first integrated circuit device, and the second integrated circuit device for forming an integration port including exposing the integration contacts, the integration port fully above the lead frame and exposed from the enclosure;
- and
- coupling a third integrated circuit device with the chip interconnect on the integration port including coupling a ball grid array, a wafer level chip scale package, a quad flat pack, a small outline package, a flip chip integrated circuit, or discrete components.
An integrated circuit package system comprising:
- a package base including:
- a lead frame,
- a first integrated circuit device under the lead frame,
- an extended integration substrate, having a substrate bottom, coupled to the lead frame by a chip interconnect, the chip interconnect vertically extended between the extended integration substrate and the lead frame,
- a side of a second integrated circuit device attached to the substrate bottom with an adhesive, the adhesive fully covering the side, and
- an enclosure molded on the lead frame, the extended integration substrate, the first integrated circuit device, and the second integrated circuit device for forming an integration port, the integration port fully above the lead frame and exposed from the enclosure;
- and
- a third integrated circuit device on the integration port.
Dependencies are inferred from the claim text.