Method for the rapid synchronisation of a device for receiving scrambled data, using an optimised calculation of a synchronisation value
AssigneeWavecom
InventorsMaarten De Vries, Samir Dechicha
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Abstract
The disclosure relates to a method of synchronising a device for receiving scrambled data, using at least one periodic scrambling sequence which is divided into K time intervals, each interval comprising N bit periods known as symbols. In particular, one such method includes calculating a synchronisation value of at least one polynomial that generates the aforementioned scrambling sequence within a pre-determined synchronisation time interval and synchronisation bit period. During the calculation step, the sequence is progressed through at increments of at least one time interval and at least one bit period, using a matrix calculation of the synchronisation value.
Claims19
A method for synchronising a device for receiving scrambled data, the method comprising:
- receiving scrambled data that has been scrambled by at least one periodic scrambling sequence organized into K time intervals, each including N periods of bits called symbols;
- and
- calculating a synchronization value of at least one generator polynomial of said scrambling sequence, in a predetermined synchronization time and synchronization bit period, wherein, in said calculation step, a matrix calculation of said synchronization value is implemented that operates successively:
- a jump of at least one time interval inside said sequence, in order to position on a desired time interval;
- and
- a jump of at least one bit period inside said desired time interval, in order to position on a desired bit period
- wherein said data is scrambled according to at least two scrambling sequences X and Y, wherein an initialization value for said sequence Y is set and an initialization value for said sequence X is characteristic of a device for transmission of said scrambled data, and wherein, to reach an index phase vector (β+μ) from an index phase vector β of said scrambling sequence by successive jumps of value i, at least the following series of steps is carried out:
- breaking down the index value μ in the form of a sum of the quotient and the remainder r of the Euclidian division of μ by i, said quotient being expressed in the form of a product of an integer j with said jump value i;
- increasing to the integer power j said time interval transfer matrix of said sequence X, said time interval including ranges of i bit periods;
- multiplying said index phase vector β by said time interval transfer matrix (MXi)j, so as to obtain the value of said index phase vector (β+i×j), then;
- multiplying said index phase vector (β+i×j) by said bit period transfer matrix (MXr), so as to be positioned on the correct bit period value;
- so as to be limited to a value of (j+r) the number of clock cycles to be applied in order to reach said desired index phase vector (β+μ).
Device for receiving scrambled data that has been scrambled by at least one periodic scrambling sequence, and organised into time intervals each including at least one bit period called a symbol, wherein the device comprises:
- a synchroniser comprising a calculator, which calculates a value for synchronisation of at least one generator polynomial of said scrambling sequence, by implementing a matrix calculation of said synchronisation value that operates successively:
- a jump of at least one time interval inside said sequence, in order to position on a desired time interval;
- and
- a jump of at least one bit period inside said desired time interval, in order to position on a desired bit period,
- wherein said data is scrambled according to at least two scrambling sequences X and Y, wherein an initialization value for said sequence Y is set and an initialization value for said sequence X is characteristic of a device for transmission of said scrambled data, and wherein, to reach an index phase vector (β+μ) from an index phase vector β of said scrambling sequence by successive jumps of value i, at least the following series of steps is carried out:
- breaking down the index value μ in the form of a sum of the quotient and the remainder r of the Euclidian division of μ by i, said quotient being expressed in the form of a product of an integer j with said jump value i;
- increasing to the integer power j said time interval transfer matrix of said sequence X, said time interval including ranges of i bit periods;
- multiplying said index phase vector β by said time interval transfer matrix (MXi)j, so as to obtain the value of said index phase vector (β+i×j), then;
- multiplying said index phase vector (β+i×j) by said bit period transfer matrix (MXr), so as to be positioned on the correct bit period value;
- so as to be limited to a value of (j+r) the number of clock cycles to be applied in order to reach said desired index phase vector (β+μ).
Mobile radiocommunication terminal comprising:
- means for receiving scrambled data by means of at least one periodic scrambling sequence, and organised into time intervals (frames) each including at least one bit period called a symbol;
- and
- means for synchronisation of said receiving means including means for calculating a synchronisation value of at least one generator polynomial of said scrambling sequence, by implementing a matrix calculation of said synchronisation value that operates successively:
- a jump of at least one time interval inside said sequence, in order to position on a desired time interval;
- and
- a jump of at least one bit period inside said desired time interval, in order to position on a desired bit period,
- wherein said data is scrambled according to at least two scrambling sequences X and Y, wherein an initialization value for said sequence Y is set and an initialization value for said sequence X is characteristic of a device for transmission of said scrambled data, and wherein, to reach an index phase vector (β+μ) from an index phase vector β of said scrambling sequence by successive jumps of value i, at least the following series of steps is carried out:
- breaking down the index value μ in the form of a sum of the quotient and the remainder r of the Euclidian division of μ by i, said quotient being expressed in the form of a product of an integer j with said jump value i;
- increasing to the integer power j said time interval transfer matrix of said sequence X, said time interval including ranges of i bit periods;
- multiplying said index phase vector β by said time interval transfer matrix (MXi)j, so as to obtain the value of said index phase vector (β+i×j), then;
- multiplying said index phase vector (β+i×j) by said bit period transfer matrix (MXr) so as to be positioned on the correct bit period value;
- so as to be limited to a value of (j+r) the number of clock cycles to be applied in order to reach said desired index phase vector (β+μ).
Dependencies are inferred from the claim text.