Method and system for optimizing performance based on cache analysis
AssigneeWind River Systems, Inc.
InventorsRoger Wiles, Maarten Koning
Life of this patent
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Abstract
Described is a method and system for optimizing a code layout for execution on a processor including internal and/or external cache memory. The method and system includes executing a program having a first layout, generating at least one memory access parameter for the program, the memory access parameter being based on a cache memory of a computing system on which the program is designed to run and constructing a second layout for the program as a function of the at least one memory access parameter.
Claims19
A system including a memory to store a set of instructions executable by a processor, the set of instructions being operable to:
- compile and execute a program having a first layout of source code routines;
- generate at least one memory access parameter for the program, the memory access parameter being based on a cache memory of a computing system on which the program is designed to run, the at least one memory access parameter including at least one of execution frequency data and execution criticality data;
- and
- recompile and execute the program having a second layout of source code routines, wherein the at least one memory access parameter is used by a linker to construct the second layout for the program based on at least one of the execution frequency data and the execution criticality data, and wherein a loader rearranges the second layout of the source code routines based on the at least one of the execution frequency data and the execution criticality data to perform loading.
A system, comprising:
- a memory to store a program;
- and
- a processor including:
- a hardware simulator component to compile and execute the program having a first layout of source code routines, the hardware simulator component generating at least one memory access parameter for the program, the memory access parameter being based on a cache memory of a computing system on which the program is designed to run, the at least one memory access parameter including at least one of execution frequency data and execution criticality data;
- a linker component to construct a second layout of source code routines for the program based on at least one of the execution frequency data and the execution criticality data, wherein the hardware simulator component recompiles and executes the program having the second layout of source code;
- and
- a loader rearranges the second layout of the source code routines based on the at least one of the execution frequency data and the execution criticality data to perform loading.
Dependencies are inferred from the claim text.