Apparatus, system, and method for using multi-level cell storage in a single-level cell mode

A computer program product, comprising:

• a computer readable storage device to store a computer readable program, wherein the computer readable program, when executed by a processor within a computer, causes the computer to perform operations for storing data in an electronic memory device, the operations comprising:
• receiving a write command to write the data to an electronic memory device having multi-level cell (MLC) memory elements, wherein each MLC memory element is programmable to 2^X designated programming states, wherein each designated programming state is representative of X bits of data, where X>1;
• and
• programming at least one of the MLC memory elements to one of a plurality of restricted programming states in a reduced-level cell (RLC) mode to represent Y bits of the data, where Y<X, wherein the restricted programming states exclude at least one of the designated programming states, and the restricted programming states comprise:
• a first state which is an erase state;
• and
• a second state, other than the erase state, which is closest to a natural threshold voltage of the MLC memory elements.

A controller for an electronic memory device having multi-level cell (MLC) memory elements, wherein each MLC memory element is capable of storing at least two data bits, the controller comprising:

• a physical interface to couple the controller to the electronic memory device;
• and
• a processing unit coupled to the physical interface, the processing unit to operate the electronic memory device in a single-level cell (SLC) mode using a restricted number of programming states for a single data bit, wherein the restricted number of programming states comprise:
• a first state which is an erase state;
• and
• a second state, other than the erase state, which is closest to a natural threshold voltage of the MLC memory elements.