Implementation of multiple error detection schemes for a cache

A method of operating a cache including a plurality of cache lines, wherein each cache line of the plurality of cache lines includes a detection type field, a cache data field, and a detection field, wherein a detection type field of a cache line indicates an error detection scheme of a plurality of error detection schemes currently in use for information stored in a cache data field of the cache line, wherein the plurality of error detection schemes includes a multiple bit error detection scheme and a single bit error detection scheme, the method comprising:

• receiving a read access address corresponding to a read access of instruction type information;
• determining whether the read access address results in a hit or a miss in the cache;
• when the read access address results in a miss, allocating a cache line of the plurality of cache lines, fetching new information corresponding to the read access address from a memory, storing the new information into a cache data field of the allocated cache line, setting a detection type field of the allocated cache line to indicate a multiple bit error detection scheme, generating one or more detection bits for the new information according to the multiple bit error detection scheme, and storing the one or more detection bits in a detection field of the allocated cache line;
• and
• when the read access address results in a hit and when the detection type field of the cache line which resulted in the hit indicates the multiple bit error detection scheme, performing multiple bit error checking on information from a cache data field of the cache line which resulted in the hit using information of the detection field of the cache line which resulted in the hit.

A method of operating a cache including a plurality of cache lines, wherein each cache line of the plurality of cache lines includes a detection type field, a cache data field, and a detection field, wherein a detection type field of a cache line indicates an error detection scheme of a plurality of error detection schemes currently in use for information stored in a cache data field of the cache line, wherein the plurality of error detection schemes includes a multiple bit error detection scheme and a single bit error detection scheme, the method comprising:

• receiving a read access address corresponding to a read access of information;
• determining whether the read access address results in a hit or a miss in the cache;
• and
• when the read access address results in a miss, allocating a cache line of the plurality of cache lines, fetching new information corresponding to the read access address from a memory, storing the new information into a cache data field of the allocated cache line, setting a detection type field of the allocated cache line to indicate a multiple bit error detection scheme or the single bit error detection scheme to be used for the new information, generating one or more detection bits for the new information according to the multiple bit error detection scheme or the single bit error detection scheme to be used, and storing the one or more detection bits in a detection field of the allocated cache line.

A method of operating a cache including a plurality of cache lines, wherein each cache line of the plurality of cache lines includes a detection type field, a cache data field, and a detection field, wherein a detection type field of a cache line indicates an error detection scheme of a plurality of error detection schemes currently in use for information stored in a cache data field of the cache line, wherein the plurality of error detection schemes includes a multiple bit error detection scheme and a single bit error detection scheme, the method comprising:

• receiving a write access address corresponding to a write access of data type information;
• determining whether the write access address results in a hit or a miss in the cache;
• and
• when the write access address results in a miss, identifying a cache line of the plurality of cache lines, storing received data corresponding to the write access address into a cache data field of the identified cache line, setting a detection type field of the identified cache line to indicate a multiple bit error detection scheme or a single bit error detection scheme to be used, generating one or more detection bits for the received cache data according to the multiple bit error detection scheme or the single bit error detection scheme to be used, and storing the one or more detection bits in a detection field of the identified cache line.