Integrated circuit with interpolation to avoid harmonic interference

A circuit comprises:

• a clock circuit operating to produce a digital clock signal;
• and
• processing circuitry clocked at the digital clock signal and operating to:
• receive data at an interpolation rate of the digital clock signal;
• interpolate, in accordance with the interpolation rate, the data to produce interpolated data having a rate corresponding to a nominal digital clock rate of the digital clock signal;
• and
• process, in accordance with an adjusted digital clock rate of the digital clock signal, the interpolated data to produce processed data having a rate corresponding to the nominal digital clock rate;
• wherein harmonic components of the digital clock signal having the adjusted digital clock rate do not interfere with the operation of the at least a portion of the circuit.

A radio frequency (RF) circuit comprises:

• a clock circuit for producing a digital clock signal;
• a transmitter section for converting an analog outbound symbol stream into an outbound RF signal;
• a digital to analog conversion module for converting a digital outbound symbol stream into the analog outbound symbol stream;
• and
• processing circuitry clocked by the digital clock signal and operating to:
• receive outbound data at a nominal digital clock rate of the digital clock signal;
• modulate, at an adjusted digital clock rate of the digital clock signal, the outbound data to produce modulated outbound data having a rate corresponding to the nominal digital clock rate;
• and
• interpolate, at an interpolation rate of the digital clock signal, the modulated outbound data to produce the digital outbound symbol stream having a rate corresponding to the interpolation rate;
• wherein harmonic components of the digital clock signal having the adjusted digital clock rate do not interfere with the operation of at least a portion of the RF circuit.