Globally synchronized timestamp value counter

A method of synchronizing comprising:

• designating one of a plurality of cards residing in a chassis to be a master card;
• generating clock information and counter value information at the master and transmitting the counter value information to the plurality of cards on each of a first and a second bus line, including to the master card;
• and
• updating at least one of the plurality of cards with the counter value information received from the master card,
• wherein one or more of the plurality of cards includes one of a packet accelerator card, a packet services card, a telephony services card, and a switch processing card.

A method of synchronizing comprising:

• designating one of a plurality of cards residing in a chassis to be a master card;
• generating clock information and counter value information at the master and transmitting the counter value information to the plurality of cards on each of a first and a second bus line, including to the master card;
• and
• updating at least one of the plurality of cards with the counter value information received from the master card,
• further comprising generating a timestamp for tagging a packet using a counter at one of the plurality of cards that has been updated.

A time synchronization system comprising:

• means for providing a plurality of cards residing in a means for providing a chassis;
• the means for providing a chassis running software that selects a master card from the means for providing a plurality of cards;
• and
• the master card including a clock source and means for providing a counter, wherein the master card transmits on each of a first and a second bus line on a regular periodic basis counter value information to the means for providing a plurality of cards including the master card,
• wherein the means for providing a chassis is for providing a packet data serving node (PDSN) functionality and wherein one or more of the means for providing a plurality of cards includes a packet accelerator card, a packet services card, a telephony services card, and a switch processing card.

A time synchronization system comprising:

• a plurality of cards residing in a chassis;
• the chassis running software that selects, from the plurality of cards, a card to be the master card;
• the plurality of cards each including a clock source and a counter,
• wherein the master card further transmits counter value information to the plurality of cards on a second bus line,
• wherein the master card transmits on a first bus line, asynchronously and serially on a regular periodic basis, counter value information to the plurality of cards including to the master card,
• wherein each of the plurality of cards calculates parity of the counter value information and compares this parity with parity information calculated by the master card, and
• wherein the plurality of cards sends a notification to the chassis when a parity problem occurs.

A method of synchronizing comprising:

• designating one of a plurality of cards residing in a chassis to be a master card;
• generating clock information and counter value information at the master and transmitting the counter value information to the plurality of cards on each of a first and a second bus line, including to the master card;
• updating at least one of the plurality of cards with the counter value information received from the master card, one of the cards other than the master card calculating parity information from the counter value information;
• comparing the calculated parity information with parity information received from the master card, and
• sending a notification to the chassis when a parity problem occurs.