Meta-architecture defined programmable instruction fetch functions supporting assembled variable length instruction processors
AssigneeRenesky Tap III, Limited Liability Company
InventorGerald George Pechanek
Life of this patent
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Abstract
In an implementation, a processing system includes an instruction fetch (IF) memory storing IF instructions; an arithmetic/logic (AL) instruction memory (IMemory) storing instructions; and a programmable instruction fetch mechanism to generate IMemory instruction addresses, from IF instructions fetched from the IF memory, to select instructions to be fetched from the IMemory for execution, wherein at least one IF instruction includes a loop count field indicating a number of iterations of a loop to be performed, a loop start address of the loop, and a loop end address of the loop.
Claims24
An apparatus comprising:
- a code splitter configured to separate control instructions from function instructions, wherein the control instructions comprise one or more of branch, call, and return structures, but no arithmetic or logic instructions, and wherein the control instructions and the function instructions are in a computer program;
- a control instructions memory to store the control instructions;
- a function instruction memory to store the function instructions;
- and
- a programmable instruction fetch mechanism to generate function instruction memory addresses, from control instructions fetched from the control memory, to select function instructions to be fetched from the function instruction memory for execution, wherein at least one control instruction includes a loop count field indicating a number of iterations of a loop to be performed, a loop start address of the loop, and a loop end address of the loop.
A method comprising:
- separating function instructions from control instructions in a computer program, wherein the control instructions comprise one or more of branch, call, and return structures, but no arithmetic or logic instructions, and wherein the computer program has function instructions stored in a function instruction memory and control instructions stored in a control instructions memory;
- generating memory addresses of the function instructions by:
- fetching a control instruction from the control instructions memory, wherein the control instruction has a loop count field indicating a number of iterations of a loop to be performed, a loop start address of the loop, and a loop end address of the loop;
- and
- selecting function instructions to be fetched from the function instruction memory for execution based on fields of the control instruction that include a loop count field indicating a number of iterations of a loop to be performed, a loop start address of the loop, and a loop end address of the loop.
An article of manufacture including a computer-readable medium having instructions stored thereon that, if executed by a processor system, cause the processor system to perform operations comprising:
- receiving a computer-executable program having function instructions and control instructions, wherein the control instructions comprise one or more of branch, call, and return structures, but no arithmetic or logic instructions;
- splitting the computer-executable program between the function instructions and the control instructions;
- generating memory addresses of the function instructions by:
- fetching control instruction;
- and
- selecting function instructions to be fetched for execution based on fields of the control instruction that include a loop count field indicating a number of iterations of a loop to be performed, a loop start address of the loop, and a loop end address of the loop.
A system comprising:
- means for receiving a computer program including control instructions and function instructions, wherein the control instructions comprise one or more of branch, call, and return structures, but no arithmetic or logic instructions;
- means for separating the control instructions from the function instructions;
- means for storing the control instructions;
- means for storing the function instructions;
- and
- means for generating instruction addresses of the function instructions, from control instructions fetched from the means for storing the control instructions, to select function instructions to be fetched from the means for storing the function instructions, wherein at least one control instruction includes a loop count field indicating a number of iterations of a loop to be performed, a loop start address of the loop, and a loop end address of the loop.
Dependencies are inferred from the claim text.