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US 8,266,390 B2Granted
System and method for providing one-time programmable memory with fault tolerance
AssigneeBroadcom Corporation
InventorPaige Bushner
Life of this patent
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Abstract
Systems and methods that provide a one-time programmable (OTP) memory with fault tolerance are provided. In one example, the OTM memory may include a data portion and a multistage programming (MSP) portion. The data of the data portion may be protected by error coding. The MSP portion may include at least one MSP bit and at least one respective redundant MSP bit.
Claims28
A one-time programmable (OTP) memory, comprising:
- a data portion comprising a plurality of data bits that are protected by error coding and are only programmable once and are programmed during an initial programming cycle;
- and
- a multistage programming (MSP) portion comprising:
- a plurality of MSP bits that are only programmable once and are programmed individually or in sets during another programming cycle that is different than the initial programming cycle;
- and
- a plurality of respective redundant MSP bits that correspond to the plurality of MSP bits that can only be programmed once.
3 more elements
A one-time programmable (OTP) memory device, comprising:
- a first OTP memory portion comprising first bits that can only be programmed once and are programmed during an initial programming cycle;
- and
- a second OTP memory portion comprising second bits that can only be programmed once and are programmed individually or in sets during another programming cycle that is different than the initial programming cycle, the second memory portion being adapted to provide a fault tolerant scheme.
A method for providing a one-time programmable (OTP) memory with fault tolerance, the method comprising:
- programming a first memory portion of the OTP memory in an initial programming cycle, the first memory portion comprising a plurality of first memory portion bits that can only be programmed once;
- programming at least a part of a second memory portion comprising a plurality of second memory portion bits that can only be programmed once, with particular values individually or in sets, during another programming cycle that is different than the initial programming cycle;
- and
- programming at least a corresponding part of a redundant portion of the second memory portion comprising a plurality of second memory portion redundant bits that can only be programmed once with the particular values.
1 more element
Dependencies are inferred from the claim text.