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US 8,266,379 B2Granted
Multithreaded processor with multiple caches
AssigneeInfineon Technologies AG
InventorHee Choul Lee
Life of this patent
Estimating the term…
Abstract
A multithreaded processor includes multiple level-1 program caches and multiple level-1 data caches to decrease the likelihood of cache misses after thread switches. By using multiple level-1 caches, execution of a first thread does not cause instructions or data cached for a second thread to be replaced. Thus, when the second thread is being executed the occurrence of cache misses is reduced.
Claims12
A cache system for a multithreaded processor having a single processing core and a plurality of active threads, the cache system comprising:
- a first thread micro-cache directly coupled to the single processing core;
- and
- a second thread micro-cache directly coupled to the single processing core,
- wherein the first thread micro-cache is assigned a first active thread and the second thread micro-cache is assigned a second active thread.
1 more element
Dependencies are inferred from the claim text.