Method for processing data of flash memory by separating levels and flash memory device thereof

A method for processing data of flash memory by separating levels, comprising steps of:

• sending a logical address to a high-level translation layer (HTL) to require a data processing operation performed in a flash memory;
• obtaining a hardware structure information of the flash memory by a flash abstraction layer and then sending the hardware structure information to the HTL;
• setting a physical storage unit in the flash memory according to the hardware structure information by the HTL;
• identifying a physical storage unit in a set of physical storage units available to the data processing operation in accordance with the spare data by the HTL;
• determining a data processing flow in accordance with the hardware structure information by the HTL to convert the logical address into a physical address corresponding to the physical storage unit available to the data processing operation;
• and
• performing the data processing operation in the physical storage unit available to the data processing operation by the flash abstraction layer in accordance with the physical address transmitted from the HTL;
• wherein the HTL is used to allow a client's application program and a file system to perform the data processing action in the flash memory, and collect related information about usage status of the flash memory to manage the flash memory, and flash abstraction layer obtains a bank according to a first sub-address of the physical address, a block according to a second sub-address, a page according to a third sub-address, a sector according to a fourth sub-address, and a channel according to a fifth sub-address.

A device for processing data of flash memory by separating levels, comprising;

• a flash memory having multiple blocks;
• a circuit for executing command and converting logical address for instructing a LAL to obtain hardware structure information of the flash memory and transmit the hardware structure information to a HTL, instructing the LAL to obtain a set of spare data of the flash memory and transmit the spare data to the HTL, instructing the HTL to receive a logical address and a request for a data processing operation in the flash memory, and instructing the HTL to convert the logical address into an intermediate physical address in accordance with the hardware structure information, select a set of physical storage units corresponding to the intermediate physical address in the flash memory with a look-up table in the HTL, identify a physical storage unit in the set of physical storage units available to the data processing operation in accordance with the spare data, and determine a data processing flow in accordance with the hardware structure information and the spare data to convert the logical address to a physical address corresponding to the physical storage unit available to the data processing operation;
• and
• a circuit for executing command and addressing physical address used 22 for instructing the LAL to perform the data processing operation in the physical 23 storage unit available to the data processing operation in accordance with the 24 physical address transmitted from the HTL;
• wherein the HTL is used to allow a client's application program and a file system to perform the data processing action in the flash memory, and collect related information about usage status of the flash memory to manage the flash memory, and LAL obtains a bank according to a first sub-address of the physical address, a block according to a second sub-address, a page according to a third sub-address, and a channel according to a fourth sub-address.