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US 8,266,361 B1Granted
Access methods and circuits for devices having multiple buffers
AssigneeCypress Semiconductor Corporation
InventorsJohn Jikku, Venkata Suresh Babu
Life of this patent
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Abstract
An integrated circuit device may include a mask register that stores mask values writable from a processor interface; and mask logic that selectively masks status indications from each of a plurality of buffers according to stored mask values; wherein the buffers alter the status indications in response to accesses from at least one different interface other than the processor interface.
Claims20
An integrated circuit device, comprising:
- a status controller configured to logically combine status indications from a plurality of different buffers, to generate a single ready/busy indication output signal representing a state of the plurality of different buffers, the status controller configured to receive from a processor an access command targeting one of the plurality of different buffers responsive to a change in the single ready/busy indication and mask the status indications for all but the targeted one of the plurality of different buffers responsive to the access command, wherein if the unmasked status indication indicates that the targeted buffer is available, the status controller is configured to force the unmasked status indication to indicate that the targeted buffer is not available when the buffer is being accessed, and upon completion of the targeted buffer being accessed, unmask all of the status indications.
An integrated circuit device, comprising:
- a mask register configured to store mask values writable from a processor interface;
- and
- mask logic configured to selectively mask status indications from each of a plurality of buffers according to stored mask values, wherein the status indications change in response to accesses to their respective buffers, wherein the mask logic is configured to selectively mask all but one of the status indications in response to a change in at least one of the status indications, wherein if the unmasked status indication indicates that a buffer is available, the mask logic is configured to force the unmasked status indication to indicate the buffer is not available when the buffer is being accessed, and upon completion of the buffer being accessed, unmask all status indications.
A method comprising:
- requesting, from a processor, a transaction for any of a plurality of memory buffers by logically combining status indications for the memory buffers to generate a single ready/busy indication for the processor;
- responsive to a command associated with the transaction, from the processor, masking status indications for all but one memory buffer when executing the transaction on the one memory buffer, wherein if the unmasked status indication indicates the one memory buffer is available, forcing the unmasked status indication to indicate the one memory buffer is not available when executing the transaction;
- and
- upon completion of executing the transaction, unmasking all status indications.
1 more element
Dependencies are inferred from the claim text.