Simulation and emulation of a circuit design

A system for co-simulation of a portion of a circuit design, comprising:

• programmable logic circuitry;
• and
• a computing arrangement including a processor and memory coupled to the programmable logic circuitry;
• wherein the computing arrangement is configured to:
• compile each of one or more module instances of a plurality of module instances of a high level modeling system circuit design into both a respective simulation model and a respective emulation model;
• identify a port name, direction, and type of each input and output port of each of the one or more module instances;
• generate for each of the one or more module instances, in response to the identified port name, direction, and type of each input and output port, a memory map for accessing the respective emulation model;
• configure the programmable logic circuitry to operate in accordance with each emulation model;
• send and receive emulation data to and from the programmable logic circuitry during operation of the programmable logic circuitry;
• for each module instance of the one or more module instances, concurrently simulate the module instance on the computing arrangement using the respective simulation model and emulate the module instance on the programmable logic circuitry using the respective emulation model;
• compare results from the simulation of the simulation model with results of emulation of the emulation model;
• in response to a discrepancy between the compared results, store discrepancy data indicating a time and module instance in which the discrepancy occurred;
• and
• output results from the simulation and emulation of the respective simulation and emulation models.

An article of manufacture, comprising:

• an electronically readable non-transitory storage medium storing instructions that, when loaded into a processor, cause the processor to:
• select one or more module instances from a plurality of module instances of a high level modeling system circuit design to be both simulated within a software simulation environment and emulated on programmable logic circuitry;
• compile each of the one or more module instances into both a respective simulation model and a respective emulation model in response to a first user command;
• identify a port name, direction, and type of each input and output port of each of the one or more module instances;
• generate for each of the one or more module instances, in response to the identified port name, direction, and type of each input and output port, a memory map for accessing the respective emulation model;
• configure the programmable logic circuitry using each respective emulation model;
• configure the simulation environment to communicate with each respective emulation model during simulation and emulation;
• for each module instance of the one or more module instances, concurrently simulate and emulate the respective simulation model and emulation model of the module instance;
• compare results from the simulation of the simulation model with results of emulation of the emulation model;
• in response to a discrepancy between the compared results, store discrepancy data indicating a time and module instance in which the discrepancy occurred;
• and
• output results from the simulation and emulation of each respective simulation model and each respective emulation model.