Techniques for asynchronous data recovery
AssigneeFreescale Semiconductor, Inc.
InventorsSamir J Soni, Uday Padmanabhan, Michael D. Vicker
Life of this patent
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Abstract
A data recovery circuit includes a pulse width indicator circuit, an edge detection circuit and a first storage. The pulse width indicator circuit is configured to receive, at an input, a data stream and provide pulses, at respective outputs, that are indicative of respective data bits in the received data stream. The edge detection circuit is configured to receive, on respective inputs, the pulses from the pulse width indicator circuit and provide respective storage signals, on respective outputs that are indicative of a logic level of the respective data bits, responsive to the pulses. The first storage is configured to receive and store the respective storage signals.
Claims15
A data recovery circuit, comprising:
- a pulse width indicator circuit configured to receive, at an input, a data stream and provide, at respective outputs, pulses that are indicative of a logic level of respective data bits in the received data stream;
- an edge detection circuit having respective inputs coupled to the respective outputs of the pulse width indicator circuit, wherein the edge detection circuit is configured to receive, on the respective inputs, the pulses from the pulse width indicator circuit and provide, on respective outputs, respective storage signals responsive to the pulses;
- and
- a first storage having respective storage inputs coupled to the respective outputs of the edge detection circuit, wherein the first storage is configured to receive and store the respective storage signals, and wherein the pulse width indicator circuit includes a first inverter chain that detects positive pulses and a second inverter chain that detects negative pulses, wherein the first and second inverter chains each include a series of alternating imbalanced inverter stages.
A method for recovering data from a data stream, comprising:
- receiving, at an input of a pulse width indicator circuit, a data stream;
- providing pulses, at respective outputs of the pulse width indicator circuit, that are indicative of a logic level of respective data bits in the received data stream;
- receiving, on respective inputs of an edge detection circuit, the pulses from the pulse width indicator circuit;
- providing respective storage signals, on respective outputs of the edge detection circuit, responsive to the pulses;
- receiving the respective storage signals, on respective inputs of a first storage;
- providing, from a trigger output of the edge detection circuit, a respective trigger signal responsive to each of the pulses;
- receiving, at an input of a round-robin mask circuit, the respective trigger signal;
- and
- selectively enabling, using the round-robin mask circuit, respective bit storage units in the first storage to receive and store the respective storage signals in the first storage in a circular manner responsive to the respective trigger signal, wherein the respective storage signals correspond to the respective data bits recovered from the received data stream, wherein the pulse width indicator circuit includes a first inverter chain that detects positive pulses and a second inverter chain that detects negative pulses, and wherein the first and second inverter chains each include a series of alternating imbalanced inverter stages.
A method for recovering data from a data stream, comprising:
- providing, at respective outputs of a pulse width indicator circuit, pulses that are indicative of a logic level of respective data bits in a received data stream;
- providing, on respective outputs of an edge detection circuit, respective storage signals responsive to the pulses;
- providing, from a trigger output of the edge detection circuit, a respective trigger signal responsive to each of the pulses;
- and
- selectively enabling respective bit storage units in a first storage to receive and store the respective storage signals, which correspond to the respective data bits recovered from the received data stream, in the first storage in a circular manner responsive to the respective trigger signal.
Dependencies are inferred from the claim text.