Back to results
US 8,264,895 B2Granted
Resistance based memory circuit with digital sensing
AssigneeQUALCOMM Incorporated
InventorHari Rao
Life of this patent
Estimating the term…
Abstract
A method of sensing a data value stored at a resistance based memory is disclosed. The method includes receiving a data signal from a data cell. The data cell includes a resistance based memory element. A reference signal is received from a reference circuit. The reference circuit includes a resistance based memory element. The data signal is converted to a data output signal having a first frequency. The reference signal is converted to a reference output signal having a second frequency. A first output signal is generated when the first frequency exceeds the second frequency. A second output signal is generated when the second frequency exceeds the first frequency.
Claims54
A method of sensing a data value stored at a resistance based memory, the method comprising:
- receiving a data signal from a data cell including a resistance based memory element;
- receiving a reference signal from a reference circuit including a resistance based memory element;
- converting the data signal to a data output signal having a first frequency;
- converting the reference signal to a reference output signal having a second frequency;
- and
- generating a first output signal when the first frequency exceeds the second frequency and generating a second output signal when the second frequency exceeds the first frequency.
3 more elements
A method of validating a state of a resistance based memory, the method comprising:
- receiving a first reference signal indicative of a first state of a first reference circuit that includes a resistance based memory element;
- converting the first reference signal to a first reference output signal having a first frequency;
- comparing the first reference output signal to a first threshold value;
- and
- storing a fault condition in a memory based on the first threshold value comparison.
2 more elements
An apparatus comprising:
- a memory comprising:
- a data cell including a first resistance based memory element, wherein the data cell is configured to generate a data signal;
- a reference cell including a second resistance based memory element, wherein the reference cell is configured to generate a reference signal;
- an oscillator coupled to receive the data signal and coupled to receive the reference signal, wherein the oscillator is configured to generate a data output signal having a first frequency and to generate a reference output signal having a second frequency;
- and
- a comparator coupled to receive the data output signal and coupled to receive the reference output signal, wherein the comparator is configured to generate a first output signal when the first frequency exceeds the second frequency and is configured to generate a second output signal when the second frequency exceeds the first frequency.
3 more elements
An apparatus comprising:
- a memory comprising:
- means for receiving a data signal from a data cell including a resistance based memory element;
- means for receiving a reference signal from a reference circuit including a resistance based memory element;
- means for converting the data signal to a data output signal having a first frequency;
- means for converting the reference signal to a reference output signal having a second frequency;
- and
- means for generating a first output signal when the first frequency exceeds the second frequency and for generating a second output signal when the second frequency exceeds the first frequency.
4 more elements
A method comprising:
- a first step for receiving a data signal from a data cell including a resistance based memory element;
- a second step for receiving a reference signal from a reference circuit including a resistance based memory element;
- a third step for converting the data signal to a data output signal having a first frequency;
- a fourth step for converting the reference signal to a reference output signal having a second frequency;
- and
- a fifth step for generating a first output signal when the first frequency exceeds the second frequency and generating a second output signal when the second frequency exceeds the first frequency.
3 more elements
A computer readable tangible medium storing instructions executable by a computer, the instructions comprising:
- instructions that are executable by the computer to receive a data signal from a data cell including a resistance based memory element;
- instructions that are executable by the computer to receive a reference signal from a reference circuit including a resistance based memory element;
- instructions that are executable by the computer to convert the data signal to a data output signal having a first frequency;
- instructions that are executable by the computer to convert the reference signal to a reference output signal having a second frequency;
- and
- instructions that are executable by the computer to generate a first output signal when the first frequency exceeds the second frequency and generate a second output signal when the second frequency exceeds the first frequency.
3 more elements
A method comprising:
- receiving design information representing at least one physical property of a semiconductor device, the semiconductor device including:
- a data cell including a first resistance based memory element, wherein the data cell is configured to generate a data signal;
- a reference cell including a second resistance based memory element, wherein the reference cell is configured to generate a reference signal;
- an oscillator coupled to receive the data signal and coupled to receive the reference signal, wherein the oscillator is configured to generate a data output signal having a first frequency and to generate a reference output signal having a second frequency;
- and
- a comparator coupled to receive the data output signal and coupled to receive the reference output signal, wherein the comparator is configured to generate a first output signal when the first frequency exceeds the second frequency and is configured to generate a second output signal when the second frequency exceeds the first frequency;
- transforming the design information to comply with a file format;
- and generating a data file including the transformed design information.
5 more elements
A method comprising:
- receiving a data file including design information corresponding to a semiconductor device;
- and
- fabricating the semiconductor device according to the design information, wherein the semiconductor device includes:
- a data cell including a first resistance based memory element, wherein the data cell is configured to generate a data signal;
- a reference cell including a second resistance based memory element, wherein the reference cell is configured to generate a reference signal;
- an oscillator coupled to receive the data signal and coupled to receive the reference signal, wherein the oscillator is configured to generate a data output signal having a first frequency and to generate a reference output signal having a second frequency;
- and
- a comparator coupled to receive the data output signal and coupled to receive the reference output signal, wherein the comparator is configured to generate a first output signal when the first frequency exceeds the second frequency and is configured to generate a second output signal when the second frequency exceeds the first frequency.
5 more elements
A method comprising:
- receiving design information including physical positioning information of a packaged semiconductor device on a circuit board, the packaged semiconductor device including a semiconductor structure comprising:
- a data cell including a first resistance based memory element, wherein the data cell is configured to generate a data signal;
- a reference cell including a second resistance based memory element, wherein the reference cell is configured to generate a reference signal;
- an oscillator coupled to receive the data signal and coupled to receive the reference signal, wherein the oscillator is configured to generate a data output signal having a first frequency and to generate a reference output signal having a second frequency;
- and
- a comparator coupled to receive the data output signal and coupled to receive the reference output signal, wherein the comparator is configured to generate a first output signal when the first frequency exceeds the second frequency and is configured to generate a second output signal when the second frequency exceeds the first frequency;
- and
- transforming the design information to generate a data file.
5 more elements
A method comprising:
- receiving a data file including design information including physical positioning information of a packaged semiconductor device on a circuit board;
- and
- manufacturing the circuit board configured to receive the packaged semiconductor device according to the design information, wherein the packaged semiconductor device includes a semiconductor structure comprising:
- a data cell including a first resistance based memory element, wherein the data cell is configured to generate a data signal;
- a reference cell including a second resistance based memory element, wherein the reference cell is configured to generate a reference signal;
- an oscillator coupled to receive the data signal and coupled to receive the reference signal, wherein the oscillator is configured to generate a data output signal having a first frequency and to generate a reference output signal having a second frequency;
- and
- a comparator coupled to receive the data output signal and coupled to receive the reference output signal, wherein the comparator is configured to generate a first output signal when the first frequency exceeds the second frequency and is configured to generate a second output signal when the second frequency exceeds the first frequency.
5 more elements
An apparatus comprising:
- a first reference circuit including a resistance based memory element, wherein the first reference circuit is configured to generate a first reference signal indicative of a first state of the first reference circuit;
- an oscillator configured to convert the first reference signal into a first reference output signal having a first frequency;
- a comparator configured to compare the first reference signal and a first threshold value to produce a first comparison result;
- and
- a memory to store a first fault condition based on the first comparison result.
2 more elements
An apparatus comprising:
- means for receiving a first reference signal indicative of a first state of a first reference circuit that includes a resistance based memory element;
- means for converting the first reference signal to a first reference output signal having a first frequency;
- means for comparing the first reference output signal and a first threshold value to produce a first comparison result;
- and
- means for storing a first fault condition in a memory based on the first comparison result.
2 more elements
A non-transitory computer-readable medium comprising processor-executable instructions that, when executed by a processor, cause the processor to:
- receive a first reference signal indicative of a first state of a first reference circuit that includes a resistance based memory element;
- convert the first reference signal to a first reference output signal having a first frequency;
- compare the first reference output signal and a first threshold value to produce a first comparison result;
- and
- provide a first fault condition for storage in a memory based on the first comparison result.
2 more elements
Dependencies are inferred from the claim text.