Flash memory device configured to reduce common source line noise, methods of operating same, and memory system incorporating same
AssigneeSamsung Electronics Co., Ltd.
InventorsYoon-Hee Choi, Ki tae Park, Bo Geun Kim
Life of this patent
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Abstract
A flash memory device comprises memory cells connected between a bit line and a common source line, word lines connected to the memory cells, a common source line feedback circuit connected to a common source line (CSL) to detect the voltage level of the common source line, and a CSL feedback control logic configured to control a voltage level of a selected word line or a selected bit line to be compensated to a substantially constant value during a sensing operation of the memory cells based on the detected voltage level of the CSL.
Claims20
A flash memory device comprising:
- a plurality of memory cells connected between a bit line and a common source line (CSL);
- a plurality of word lines connected to the respective memory cells;
- a CSL feedback circuit connected to the common source line to detect a voltage level of the common source line;
- and
- CSL feedback control logic configured to control a voltage level of a selected word line or a selected bit line to be compensated to a constant level based on the voltage level detected by the CSL feedback circuit and independent of a voltage level change of the common source line during a sensing operation of the plurality of memory cells.
A method of operating a flash memory device, comprising:
- precharging a selected bit line connected to a selected memory cell;
- detecting a voltage level of a common source line before sensing a precharged voltage of the selected bit line;
- controlling a voltage level of a selected word line or a selected bit line of the selected memory cell to be compensated to a constant voltage based on the detected common source line voltage;
- and
- sensing the precharged voltage of the selected bit line.
A memory system comprising:
- a flash memory device comprising a selected memory cell connected between a common source line (CSL) and a selected bit line, and a selected word line connected to the selected memory cell;
- and
- a memory controller configured to control the flash memory device,
- wherein the flash memory device is configured such that a voltage level of the selected word line or the selected bit line is compensated to a constant voltage during a sensing operation of the selected memory cell based on a noise voltage detected on the CSL.
Dependencies are inferred from the claim text.