Display underflow prevention
AssigneeAdvanced Micro Devices, Inc.
InventorsOleksandr Khodorkovsky, Mahendra Persaud
Life of this patent
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Abstract
In devices in which display data is read from a memory for display, display underflow in a processing block is alleviated by controlling a clock frequency driving the processing block. Stages of the processing block send underflow detection signals to underflow prevention logic. The underflow prevention logic controls the frequencies of clock signals generated by a clock generator to alleviate the underflow condition.
Claims23
A method for preventing display underflow, comprising:
- receiving a plurality of underflow signals from a plurality of processing units of a display block;
- determining whether an underflow condition occurred for one of the plurality of processing units based on the underflow signals;
- in response to a determination that the underflow condition occurred, generating a control signal to adjust a frequency of a clock signal controlling the one of the plurality of processing units to alleviate the underflow condition, wherein the adjusting the frequency of the clock signal depends on which of the plurality of the processing units caused the underflow condition;
- and
- in response to a determination that the underflow condition is alleviated, generating a reset signal to restore the frequency of the clock signal to a default frequency.
A display arrangement for preventing display underflow, comprising:
- a display block for receiving data from a memory to be displayed on a display, the display block including serially connected memory buffers and processing units, each processing unit generating an underflow signal;
- a clock generator constructed and arranged to provide a clock signal to control the memory buffers and the processing units;
- and
- underflow prevention logic constructed and arranged to receive the underflow signals from the processing units, determine whether an underflow condition occurred, generate a control signal to control a frequency of the clock signal provided by the clock generator to alleviate the underflow condition if the underflow condition occurred, determine whether the underflow condition is alleviated, and generate a reset signal to restore the frequency of the clock signal to a default frequency if the underflow condition is alleviated, wherein the controlling the frequency of the clock signal depends on which of the processing units caused the underflow condition.
A non-transitory computer readable media containing program code which when executed prevents display underflow by carrying out the following process:
- receiving a plurality of underflow signals from a plurality of processing units of a display block;
- determining whether an underflow condition occurred for one of the plurality of processing units based on the underflow signals;
- in response to a determination that the underflow condition occurred, generating a control signal to adjust a frequency of a clock signal controlling the one of the plurality of processing units to alleviate the underflow condition, wherein the adjusting the frequency of the clock signal depends on which of the plurality of the processing units caused the underflow condition;
- and
- in response to a determination that the underflow condition is alleviated, generating a reset signal to restore the frequency of the clock signal to a default frequency.
Dependencies are inferred from the claim text.