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US 8,264,267 B2Granted
Clock pulse generating circuit
AssigneeHynix Semiconductor Inc.
InventorHun Sam Jung
Life of this patent
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Abstract
A clock pulse generating circuit includes a pulse generator, a clock regulator, and a pre-driver. The pulse generator is configured to vary pulse widths of a rising clock signal and a falling clock signal. The clock regulator is configured to regulate output signals of the pulse generator to prevent an overlap and a duty drop of the output signals of the pulse generator. The pre-driver is configured to output data driving signals according to output signals of the clock regulator.
Claims12
A clock pulse generating circuit comprising:
- a pulse generator configured to vary a first pulse width of a rising clock signal and a second pulse width of a falling clock signal;
- a clock regulator configured to regulate output signals of the pulse generator to prevent an overlap and a duty drop of the output signals of the pulse generator;
- a pre-driver configured to output data driving signals according to output signals of the clock regulator;
- and
- a data controller configured to control input data signals in response to the data driving signals.
2 more elements
Dependencies are inferred from the claim text.