Integrated circuits on a wafer and method of producing integrated circuits

A method for producing integrated circuits,

• comprising the steps of:
• providing a plurality of integrated circuits on a wafer separated by saw lines, the integrated circuits on the wafer comprising a passivation layer and first and second integrated circuits which each include an electric circuit, wherein only the first integrated circuits comprise each at least one alignment bump extending from the passivation layer used as alignment marks and not contacting their electric circuits, and the integrated circuits on the wafer having being tested and registered as working and non-working integrated circuits;
• separating the integrated circuits on the wafer;
• the separated integrated circuits being placed on a film frame carrier;
• and
• automatically picking up the working integrated circuits from the film frame carrier utilizing a pick-and-place system which is aligned utilizing the alignment bumps of the first integrated circuits.

An apparatus comprising:

• a semiconductor wafer;
• a plurality of integrated circuits arranged in an array on the wafer;
• a passivation layer on the plurality of integrated circuits;
• for each integrated circuit, at least one contact bump extending above the passivation layer and contacting the integrated circuit;
• and
• an array of alignment bumps extending above the passivation layer, each of the alignment bumps being
• on a portion of the passivation layer over one of the integrated circuits,
• electrically isolated from the integrated circuits by the passivation layer,
• separated from the at least one contact bump that contacts the integrated circuit over which the alignment bump is located, and
• separated from other ones of the alignment bumps by a common number of the integrated circuits.