Convex shaped thin-film transistor device
AssigneeSpansion LLC
InventorsYukio Hayakawa, Hiroyuki Nansei
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Abstract
The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density, and a method of manufacturing such a semiconductor device. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines on the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the respective first bit lines; and charge storage layers that are provided on the opposite side faces of the channel layers from the side faces on which the insulating layers are formed.
Claims24
A semiconductor device comprising:
- a plurality of first bit lines comprising a plurality of upper faces, the plurality of first bit lines provided on a substrate, the substrate comprising a surface;
- an insulating layer that is provided between the plurality of first bit lines on the substrate, the insulating layer comprising opposing side faces, wherein an upper face of the insulating layer is higher than a plurality of upper faces of the plurality of first bit lines;
- a plurality of channel layers provided on the side faces of the insulating layer and coupled to the respective first bit lines of the plurality of first bit lines;
- and
- an ONO film comprising a top oxide film, a tunnel oxide film, and a plurality of charge storage layers, the top oxide film and the tunnel oxide film each comprising top, bottom and side surfaces,
- wherein the plurality of charge storage layers is provided between the side surfaces of the top oxide film and the tunnel oxide film,
- further wherein at least a portion of the bottom surface of the top oxide film is in direct contact with the top surface of the tunnel oxide film.
A semiconductor device, comprising:
- a processor;
- a cache;
- a user input component;
- and
- a flash memory comprising:
- a plurality of first bit lines comprising a plurality of upper faces, the plurality of first bit lines provided on a substrate, the substrate comprising a surface;
- an insulating layer that is provided between the plurality of first bit lines on the substrate, the insulating layer comprising opposing side faces wherein an upper face of the insulating layer is higher than a plurality of upper faces of the plurality of first bit lines;
- a plurality of channel layers provided on both side faces of the insulating layer and coupled to the respective first bit lines;
- and
- an ONO film comprising a top oxide film, a tunnel oxide film, and a plurality of charge storage layers,
- wherein the top oxide film and the tunnel oxide film each comprises top, bottom and side surfaces,
- wherein the plurality of charge storage layers is provided between the side surfaces of the top oxide film and the tunnel oxide film, and are separated by the top surface of the tunnel oxide film,
- further wherein at least a portion of the bottom surface of the top oxide film is in direct contact with the top surface of the tunnel oxide film.
Dependencies are inferred from the claim text.