Spin transistor, programmable logic circuit, and magnetic memory
AssigneeKabushiki Kaisha Toshiba
InventorsYoshiaki Saito, Hideyuki Sugiyama
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AssigneeKabushiki Kaisha Toshiba
InventorsYoshiaki Saito, Hideyuki Sugiyama
Estimating the term…
A spin transistor includes a non-magnetic semiconductor substrate having a channel region, a first area, and a second area. The channel region is between the first and the second areas. The spin transistor also includes a first conductive layer located above the first area and made of a ferromagnetic material magnetized in a first direction; and a second conductive layer located above the second area and made of a ferromagnetic material magnetized in one of the first direction and a second direction that is antiparallel with respect to the first direction. The channel region introduces electron spin between the conductive layers. The spin transistor also includes a gate electrode located between the conductive layers and above the channel region; and a tunnel barrier film located between the non-magnetic semiconductor substrate and at least one of the conductive layers.
A spin transistor, comprising:
A spin transistor, comprising:
Dependencies are inferred from the claim text.