Field-effect transistor
AssigneePanasonic Corporation
InventorsMasahiro Hikita, Tetsuzo Ueda, Manabu Yanagihara, Yasuhiro Uemoto, Tsuyoshi Tanaka
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Abstract
An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.
Claims3
A field-effect transistor comprising:
- a substrate;
- a first nitride semiconductor layer formed above the substrate;
- a second nitride semiconductor layer being formed on the first nitride semiconductor layer and having a larger band gap energy than that of the first nitride semiconductor layer;
- a third nitride semiconductor layer formed on the second nitride semiconductor layer and having a doped layer containing a p-type impurity and a heavily-doped layer containing a p-type impurity at a higher concentration than the doped layer;
- a gate electrode formed on or above and in contact with the heavily-doped layer of the third nitride semiconductor layer;
- source and drain electrodes formed on or above the second nitride semiconductor layer so as to be located on both sides of the gate electrode, respectively;
- and
- a passivation film for covering at least a side surface of the third nitride semiconductor layer.
Dependencies are inferred from the claim text.