Back to results
US 8,263,871 B2Granted
Mount board and semiconductor module
AssigneeSony Corporation
InventorsHiroshi Asami, Osamu Yamagata
Life of this patent
Estimating the term…
Abstract
A mount board includes a laminated wiring section including a plurality of wiring layers formed on a surface of a substrate in a laminated manner, wherein a portion of an inner wiring layer is exposed to the outside, the inner wiring layer being any of the plurality of wiring layers excluding an uppermost wiring layer.
Claims7
A semiconductor module comprising:
- a mount board including a laminated wiring section that includes a plurality of wiring layers formed on a surface of a substrate in a laminated manner, the plurality of wiring layers including an uppermost wiring layer and a plurality of inner wiring layers, each inner wiring layer being any one of the plurality of wiring layers excluding the uppermost wiring layer, and the plurality of inner wiring layers comprising at least a first inner wiring layer and a second inner wiring layer that is distinct from the first inner wiring layer;
- a first semiconductor device, a second semiconductor device, and a third semiconductor device that are each mounted on the mount board and electrically connected to the uppermost wiring layer;
- and
- a plurality of cooling structures that are each mounted on the mount board,
- wherein,
- the first semiconductor device is disposed between the second and third semiconductor devices,
- the first inner wiring layer is a wiring layer right below the uppermost wiring layer,
- portions of the first inner wiring layer on respective sides of the first semiconductor device are each exposed to the outside, and a cooling structure having a gate-like shape and surrounding the first semiconductor device is thermally connected to the portions of the first inner wiring layer, and
- edge portions of the second inner wiring layer, with one edge portion being on a side of the second semiconductor device and one edge portion being on a side of the third semiconductor device, are each exposed to the outside, and respective cooling structures are thermally connected to the edge portions of the second inner wiring layer.
6 more elements
Dependencies are inferred from the claim text.