Nano-tube MOSFET technology and devices

A method for manufacturing a semiconductor power device of on a semiconductor substrate comprising:

• opening a plurality of deep trenches between lightly doped pillars and substantially filling the deep trench with alternating N and P doped multiple epitaxial layers overflowing and covering a top surface of the semiconductor substrate with a top epitaxial layer wherein the epitaxial layers form charge balanced nano tubes for functioning as conducting channels extending along a sidewall direction;
• filling a remaining central gap with a gap filler;
• said step of opening a plurality of deep trenches is performed on the top of a single crystal semiconductor substrate;
• and
• backgrinding the back side of the substrate and then forming the bottom of the semiconductor power device.

A method for manufacturing a semiconductor power device of on a semiconductor substrate comprising:

• opening a plurality of deep trenches between lightly doped pillars and substantially filling the deep trench with alternating N and P doped multiple epitaxial layers overflowing and covering a top surface of the semiconductor substrate with a top epitaxial layer wherein the epitaxial layers form charge balanced nano tubes for functioning as conducting channels extending along a sidewall direction;
• filling a remaining central gap with a gap filler;
• and
• said step of opening said trenches between said pillar columns further comprising opening trenches with multiple widths having steps.

A method for manufacturing a semiconductor power device of on a semiconductor substrate comprising:

• opening a plurality of deep trenches between lightly doped pillars and substantially filling the deep trench with alternating N and P doped multiple epitaxial layers overflowing and covering a top surface of the semiconductor substrate with a top epitaxial layer wherein the epitaxial layers form charge balanced nano tubes for functioning as conducting channels extending along a sidewall direction;
• filling a remaining central gap with a gap filler;
• said step of opening a plurality of deep trenches is performed on the top of a single crystal semiconductor substrate;
• and
• backgrinding a back side of the semiconductor substrate followed by performing an ion implantation and a rapid thermal annealing (RTA).

A method for manufacturing a semiconductor power device of on a semiconductor substrate comprising:

• opening a plurality of deep trenches between lightly doped pillars and substantially filling the deep trench with alternating N and P doped multiple epitaxial layers overflowing and covering a top surface of the semiconductor substrate with a top epitaxial layer wherein the epitaxial layers form charge balanced nano tubes for functioning as conducting channels extending along a sidewall direction;
• filling a remaining central gap with a gap filler;
• said step of opening a plurality of deep trenches is performed on the top of a single crystal semiconductor substrate;
• and
• backgrinding a back side of the semiconductor substrate followed by performing an epitaxial growth.