Method of fabricating an active device array and fabricating an organic light emitting diode array

A method of fabricating an organic light emitting diode array, the organic light emitting diode array comprising a plurality of scan line, a plurality of data lines, a plurality of power lines, and a plurality of pixels, each of the pixels comprising a first transistor, a second transistor, and a pixel electrode, wherein the first transistor is connected to one of the scan lines and one of the data lines and the second transistor is connected to the first transistor, one of the power lines, and the pixel electrode, and the method of fabricating the organic light emitting diode array comprising:

• forming a first patterned metal layer over a substrate, the first patterned metal layer comprising the data lines, first sources of the first transistors, first drains of the first transistors, and second gates of the second transistors, wherein the first drains are connected to the second gates and separated from the data lines;
• forming an oxide semiconductor layer over the substrate entirely;
• forming a first insulation layer on the substrate entirely to cover the oxide semiconductor layer and the first patterned metal layer;
• forming a second patterned metal layer on the first insulation layer, wherein the second patterned metal layer comprises the scan lines intersecting the data lines and the first drains so as to define a plurality of first gates of the first transistor;
• patterning the oxide semiconductor layer and the first insulation layer by using the second patterned metal layer as a mask to form a first patterned oxide semiconductor layer and a first patterned insulation layer, wherein the first patterned oxide semiconductor layer comprises a plurality of first channel layers of the first transistors;
• forming a second insulation layer on the substrate entirely to cover the first transistors, the scan lines, the data lines, and the second gate;
• forming a second patterned oxide semiconductor layer over the second insulation layer, the second patterned oxide semiconductor layer comprising a plurality of second channel layers located above the second gates respectively;
• forming a third patterned metal layer over the second insulation layer, the third patterned metal layer comprising the power lines, a plurality of second sources of the second transistors, and a plurality of second drains of the second transistors, wherein the second sources are connected to the power lines and the second sources and the second drains are respectively located at two opposite sides of the second gates;
• forming the pixel electrodes on the substrate, wherein each of the pixel electrodes is electrically connected to one of the second drains;
• and
• forming a third insulation layer on the substrate to cover the first active devices and the second active devices.