# US 8,243,088 B2 · Two dimensional memory access controller

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- Number: US 8,243,088 B2
- Document ID: US8243088B2
- Status: Granted
- Kind: B2
- Application number: 12/393,329
- Filed: 2009-02-26
- Published: 2010-08-26
- Granted: 2012-08-14
- Earliest claimed: 2009-02-26
- Assignees: Presagis
- Inventors: Jim Jonas
- Web page: https://patentgrep.com/patent/US8243088B2

## CPC

- G09G 5/39: Control of the bit-mapped memory
- G06F 12/1441: {for a range}
- G06F 12/0207: {with multidimensional access, e.g. row/column, matrix}
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A data processing system may include a display, the display having a display surface, and logic to modify the address signals of a graphics processing unit (GPU) if the address signals do not fall within a two-dimensional range of authorized pixel locations corresponding to a subset of the display surface, and to propagate the address signals unmodified to a display memory otherwise.

## Claims

### Claim 1

A data processing system including a display, the display having a display surface, the system comprising:
logic to derive a two dimensional pixel location on a display screen from address signals of a graphics processing unit (GPU);
logic to compare the derived two dimensional pixel location to a two dimensional range of authorized pixel locations corresponding to a subset of a display surface;
logic to modify the address signals of a graphics processing unit (GPU) if the address signals do not fall within the two-dimensional range of authorized pixel locations corresponding to the subset of the display surface, and to propagate the address signals unmodified to a display memory otherwise.

### Claim 2 (depends on 1)

The data processing system of claim 1, wherein the logic to modify the address signals of a graphics processing unit further comprises:
logic to re-direct a data value by modifying a value of the address signals.

### Claim 3 (depends on 1)

The data processing system of claim 1, wherein the logic to modify the address signals of a graphics processing unit further comprises:
logic disposed between the GPU and the display memory.

### Claim 4 (depends on 1)

The data processing system of claim 1, further comprising:
the two dimensional range of authorized pixel locations identified horizontal range and a vertical range.

### Claim 5 (depends on 4)

The data processing system of claim 4, wherein the two dimensional range of authorized pixel locations identified by a horizontal range and a vertical range further comprises:
the horizontal range comprising a plurality of values each corresponding to a column of the display, and the vertical range comprising a plurality of values each corresponding to a row of the display.

### Claim 6 (depends on 4)

The data processing system of claim 4, further comprising:
logic to set the horizontal range and the vertical range in increments.

### Claim 7 (depends on 1)

The data processing system of claim 1, further comprising:
logic to redirect addresses within a fixed refresh buffer address range to a current display buffer address range.

### Claim 8 (depends on 1)

The data processing system of claim 1, further comprising:
logic to redirect unauthorized READs to a fixed address range.

### Claim 9 (depends on 1)

The data processing system of claim 1, further comprising:
logic to redirect unauthorized WRITEs to a fixed address range.

### Claim 10

A data processing system including a display, the display having a display surface, the system comprising:
logic to intercept addresses between a graphics processing unit (GPU) and a display memory, and to modify values of unauthorized addresses but not modify values of authorized addresses;
wherein it is determined if the addresses are authorized addresses by deriving a two dimensional pixel location on a display screen from the addresses, and comparing the derived two dimensional pixel location to a two dimensional range of authorized pixel locations corresponding to a subset of the display surface.

### Claim 11 (depends on 10)

The data processing system of claim 10, further comprising:
logic to pipeline the addresses and control signals.

### Claim 12 (depends on 10)

The data processing system of claim 10, further comprising:
logic to pass data directly between the GPU and the display memory.

### Claim 13 (depends on 10)

The data processing system of claim 10, further comprising:
logic to re-direct READ operations in a fixed range corresponding to a refresh buffer to one of multiple selectable frame buffers.