Method for manufacturing hetero-bonded wafer
AssigneeYoung Hae Kim
InventorsYoung Hae Kim, Sang Hwan Lee
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AssigneeYoung Hae Kim
InventorsYoung Hae Kim, Sang Hwan Lee
Estimating the term…
A method for manufacturing a hetero-bonded wafer having a large mismatch of thermal expansion coefficient comprises forming a wafer bonding means and an electrical interconnection means on at least one bonding surface of two wafers to be bonded with each other, forming grooves in the bonding surface of one wafer along dicing lines with an interval between the grooves being equal to or an even multiple of a die width, bonding the two wafers at a temperature less than 200° C., thinning a back side of the grooved wafer such that at least a portion of the grooves is exposed, and rebonding the bonded wafer pair at an elevated temperature higher than the first bonding temperature. The method for manufacturing a hetero-bonded wafer can avoid wafer level bow/warp and also reduce debonding and cracking in individual segments induced by thermal stress due to a mismatch of thermal expansion coefficient. Embodiments of the method are useful for wafer level packaging and the fabrication of hybrid devices by heterogeneous wafer bonding.
A method for manufacturing a hetero-bonded wafer comprising:
A method for manufacturing a hetero-bonded wafer comprising:
Dependencies are inferred from the claim text.