Semiconductor memory device

A semiconductor memory device comprising:

• a local line and a complementary local line;
• a global line connected to the local line and a complementary global line connected to the complementary local line;
• a first pre-charge circuit configured to pre-charge the local line and the complementary local line to a one-half power voltage level during a pre-charge operation;
• a second pre-charge circuit configured to pre-charge the global line and the complementary global line to the one-half power voltage level during the pre-charge operation;
• and
• a pull-up circuit configured to pull-up a voltage apparent on one of the local line and the complementary local line to a full power voltage level in response to a control signal.

A method of operating a semiconductor memory device, comprising:

• respectively connecting bit lines of a bit line pair with local lines of a local line pair;
• precharging the local line pair to a one-half power voltage level;
• after pre-charge of the local line pair, communicating data from the bit line pair to the local line pair;
• using a local sensing amplifier, sensing/amplifying the data on the local line pair;
• precharging a global line pair connected to the local line pair to the one-half power voltage level;
• respectively connecting global lines of the global line pair with local lines of the local line pair and communicating the data to the global line pair;
• and thereafter,
• pulling-down a voltage apparent on one global line of the global line pair while pulling-up a voltage apparent on the other global line of the global line pair, and using a global sensing amplifier, sense/amplifying the data on the global line pair.