Array substrate with test shorting bar and display panel thereof
AssigneeAu Optronics Corporation
InventorJian-Hong Lin
Life of this patent
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Abstract
An array substrate having a display region and a peripheral circuit region adjacent to the display region is provided. The array substrate includes a pixel array, a plurality of test shorting bars and a plurality of wires. The pixel array is disposed in the display region. The test shorting bars are disposed in the peripheral circuit region. The wires electrically connected with the pixel array are disposed in the peripheral circuit region. Specially, at least one wire and the test shorting bar share a part for connecting each other and the part forms a common trace.
Claims11
An array substrate having a display region and a peripheral circuit region adjacent to the display region, the array substrate comprising:
- a pixel array disposed in the display region;
- a plurality of test shorting bars disposed in the peripheral circuit region, wherein the test shorting bars comprises a first type test shorting bar and a second type test shorting bar, and wherein the first type test shorting bar comprises a first trace and a common trace;
- and
- a plurality of wires disposed in the peripheral circuit region and electrically connected with the pixel array, wherein each wire comprises a first signal source connection wire, the common trace and a pixel array connection wire, wherein the first trace of the first type test shorting bar is connected with one of first signal source connection wires and one of pixel array connection wires through the common trace, which is used for transmitting driving signals and test signals, and wherein the second type test shorting bar is not connected with any one of first signal source connection wire and any one of pixel array connection wire.
Dependencies are inferred from the claim text.