Employing a mask field of an instruction to encode a sign of a result of the instruction
AssigneeInternational Business Machines Corporation
InventorsShawn D. Lundvall, Eric M. Schwarz, Ronald M. Smith, Sr., Phil C. Yeh
Life of this patent
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Abstract
A decimal floating point finite number in a decimal floating point format is composed from the number in a different format. A decimal floating point format includes fields to hold information relating to the sign, exponent and significand of the decimal floating point finite number. Other decimal floating point data, including infinities and NaNs (not a number), are also composed. Decimal floating point data are also decomposed from the decimal floating point format to a different format. For composition and decomposition, one or more instructions may be employed, including one or more convert instructions.
Claims30
A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising:
- a tangible computer readable storage medium readable by a processor and storing instructions for execution by the processor for performing a method comprising:
- executing the machine instruction, the machine instruction being defined for computer execution according to a computer architecture and comprising an opcode, one register field, and another register field, the executing comprising:
- performing an operation that provides a result, said result comprising a sign;
- and
- indicating by a selection indicator of the mask field how the sign is to be encoded in response to the sign being a specified sign.
A method of executing a machine instruction by a central processing unit, said method comprising:
- executing a machine instruction, the machine instruction being defined for computer execution according to a computer architecture and comprising an opcode and a mask field, the executing comprising:
- performing an operation that provides a result, said result comprising a sign;
- and indicating by a selection indicator of the mask field how the sign is to be encoded in response to the sign being a specified sign.
A computer system for executing a
- machine instruction in a central processing unit, said computer system comprising:
- a memory;
- and
- a processor coupled to the memory, the computer system configured to perform a method comprising:
- executing the machine instruction, the machine instruction being defined for computer execution according to a computer architecture and comprising an opcode, one register field, and another register field, the executing comprising:
- performing an operation that provides a result, said result comprising a sign;
- and indicating by a selection indicator of the mask field how the sign is to be encoded in response to the sign being a specified sign.
Dependencies are inferred from the claim text.