Compare instruction
AssigneeTexas Instruments Incorporated
InventorGerard Chauvel
Life of this patent
Estimating the term…
Abstract
A processor executes an instruction that causes a comparison to be performed between contents of a first register and contents of a second register and between the contents of the first register and a predetermined value. The instruction is particularly useful for determining whether an attempted access (either a load or write) to an array improperly targets a location outside the boundary of the array. In some embodiments, a system (e.g., a communication device such as cellular telephone) includes a processor capable of executing the instruction as described above.
Claims20
A processor executing a plurality of instructions, comprising:
- an arithmetic logic unit (ALU);
- and
- a plurality of registers coupled to the ALU;
- wherein said processor executes an instruction that causes a first comparison to be performed between contents of a first register and contents of a second register and a second comparison to be performed between the contents of the first register and a predetermined value;
- and
- wherein the instruction causes a first status bit to be set if either of said comparisons results in a true condition and a second status bit to be set if the first comparison determines that the contents of the first register equal the contents of the second register.
A processor, comprising:
- an arithmetic logic unit (ALU);
- and
- a plurality of registers coupled to the ALU;
- wherein said processor executes a comparison instruction that causes a determination to be made as to whether an array index value points to a location preceding or following an array so as to check whether an array boundary violation would occur for a subsequent array access instruction;
- and
- wherein the comparison instruction also causes a first status bit to be set if the array index value points to a location preceding or following the array and a second status bit to be set if the array index value equals the size of the array.
A system, comprising:
- a communication transceiver;
- and
- a co-processor coupled to said main processor unit, wherein said co-processor executes an instruction that causes a determination to be made as to whether an array index value points to a location preceding or following an array;
- wherein the instruction also causes a first status bit to be set if the array index value points to a location preceding or following the array and a second status bit to be set if the array index value equals the size of the array.
A method of executing a single instruction, comprising:
- examining the instruction to determine a first register and a second register, the first register containing an array index value and the second register containing an array size value;
- comparing the array index value to the array size value;
- comparing the array index value to a predetermine value;
- and
- setting a common status bit if a condition is true selected from a group consisting of the array index value being greater than or equal to the array size value and the array index value being less than a predetermined value.
Dependencies are inferred from the claim text.