Component built-in wiring substrate and manufacturing method thereof

A component built-in wiring substrate comprising:

• a core substrate, which is formed of a resin, including a core principal surface, a core rear surface, and a housing hole portion having an opening on the core principal surface side;
• a plate-shaped component, which is formed of a ceramic material, that has a component principal surface and a component rear surface and is housed in the housing hole portion in a state in which the core principal surface and the component principal surface are disposed to face a same side;
• a resin filling portion that is filled in a gap between an inner wall face of the housing hole portion and the plate-shaped component and that fixes the plate-shaped component to the core substrate;
• and
• a wiring stacking portion that is formed by alternately stacking resin interlayer insulating layers and a conductive layer on the core principal surface and the component principal surface and that has a plurality of solder bumps disposed inside a mounting area for mounting a chip component configured on the uppermost layer,
• wherein, when viewed from the core principal surface side, the projected area of the mounting area is larger than the projected area of the plate-shaped component and the resin filling portion, and the plate-shaped component and the resin filling portion are positioned directly below the mounting area, and
• wherein a value of the coefficient of thermal expansion (CTE α2) for a temperature range that is equal to or higher than the glass transition temperature of the resin filling portion is set to be larger than a value that is acquired by decreasing a value of the coefficient of thermal expansion of the plate-shaped component for said temperature range by 10% and is set to be smaller than a value that is acquired by increasing a value of the coefficient of thermal expansion of the core substrate for said temperature range by 10%.

A component built-in wiring substrate comprising:

• a core substrate, which is formed of a resin, including a core principal surface, a core rear surface, and a housing hole portion having an opening on the core principal surface side;
• a plate-shaped component, which is formed of a ceramic material, that has a component principal surface and a component rear surface and is housed in the housing hole portion in a state in which the core principal surface and the component principal surface are disposed to face a same side;
• a resin filling portion that is filled in a gap between an inner wall face of the housing hole portion and the plate-shaped component and that fixes the plate-shaped component to the core substrate;
• and
• a wiring stacking portion that is formed by alternately stacking resin interlayer insulating layers and a conductive layer on the core principal surface and the component principal surface and that has a plurality of solder bumps disposed inside a mounting area for mounting a chip component configured on the uppermost layer,
• wherein, when viewed from the core principal surface side, the projected area of the mounting area is larger than the projected area of the plate-shaped component and the resin filling portion, and the plate-shaped component and the resin filling portion are positioned directly below the mounting area, and
• wherein a value of the coefficient of thermal expansion (CTE α1) for a temperature range that is lower than the glass transition temperature of the resin filling portion is set to be larger than a value of the coefficient of thermal expansion of the plate-shaped component for said temperature range and is set to be smaller than the value of the coefficient of thermal expansion of the core substrate for said temperature range.

A component built-in wiring substrate comprising:

• a core substrate, which is formed of a resin, including a core principal surface, a core rear surface, and a housing hole portion having an opening on the core principal surface side;
• a plate-shaped component, which is formed of a ceramic material, that has a component principal surface and a component rear surface and is housed in the housing hole portion in a state in which the core principal surface and the component principal surface are disposed to face a same side;
• a resin filling portion that is filled in a gap between an inner wall face of the housing hole portion and the plate-shaped component and that fixes the plate-shaped component to the core substrate;
• and
• a wiring stacking portion that is formed by alternately stacking resin interlayer insulating layers and a conductive layer on the core principal surface and the component principal surface and that has a plurality of solder bumps disposed inside a mounting area for mounting a chip component configured on the uppermost layer,
• wherein, when viewed from the core principal surface side, the projected area of the mounting area is larger than the projected area of the plate-shaped component and the resin filling portion, and the plate-shaped component and the resin filling portion are positioned directly below the mounting area, and
• wherein a value of the coefficient of thermal expansion (CTE α1) for a temperature range that is lower than the glass transition temperature of the resin filling portion is set to be larger than a value that is acquired by decreasing a value of the coefficient of thermal expansion of the plate-shaped component for said temperature range by 10% and is set to be smaller than a value that is acquired by increasing the value of the coefficient of thermal expansion of the core substrate for said temperature range by 10%.