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US 8,161,224 B2Granted
Interface between a twin-wire bus and a single-wire bus
AssigneesSTMicroelectronics (Rousset) SAS, Proton World Internationl N.V.
InventorsChristophe Laurencin, Jean-Louis Modave
Life of this patent
Estimating the term…
Abstract
A method and a device for converting a first bus including at least a data wire and a clock wire into a single-wire bus, wherein a data bit of the first bus is converted on half a period of the clock signal for transmission over the second bus, a waiting pattern being placed on the second bus during the other half-period.
Claims9
A method for converting a first bus comprising at least a data wire and a clock wire into a single-wire bus, wherein:
- a data bit of the first bus is converted on half a period of the clock signal for transmission over the second bus;
- and
- a waiting pattern is set on the second bus during the other half-period, said waiting pattern being present on each first half-period of the signal present on the clock wire in a transmission from the second bus to the first bus and on each second half-period of the signal present on the clock wire for a transmission in the other direction.
Dependencies are inferred from the claim text.