High dynamic range low-power differential input stage
AssigneeNXP B.V.
InventorsOswald Josef Moonen, Marc Lambertus Vlemmings, Arnold Hendrik Neelen
Life of this patent
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Abstract
A low-power high dynamic range RF input stage (200) with a noiseless degeneration component, such as a capacitor (201), is provided. High dynamic range means a combination of low noise contribution by the stage (200) and a low level of intermodulation products occurring especially at high input levels. Low power means that the power consumption of a conventional input stage is about 5 times higher than the power consumption of the stage according to the invention, for the same noise, gain and distortion level. This new stage can be used in amplifiers, but also in the lower stage of double balanced mixers (300-400) commonly used in RF receivers, examples of which are applications, are provided.
Claims18
A double balanced mixer for an FM broadcast receiver, comprising:
- a lower stage including a low-power high dynamic range input stage comprising:
- first and second differential input transistors connected to a differential input signal, each transistor having an internal base resistance of Rb and a small signal emitter resistance of re;
- a first and second collector resistor respectively coupled to a first and second collector of the first and second differential transistor;
- and
- an emitter degeneration component connected between a first and second emitter, respectively, of the first and second differential transistor, wherein the emitter degeneration component does not include a resistor,
- wherein the first and second collector resistor each have a value of 100 ω to avoid parasitic oscillations.
A low-power high dynamic range differential input stage, comprising:
- first and second differential input transistors connected to a differential input signal, each transistor having an internal base resistance of Rb and a small signal emitter resistance of re;
- a first and second collector resistor respectively coupled to a first and second collector of the first and second differential transistor;
- and
- an emitter degeneration component connected between a first and second emitter, respectively, of the first and second differential transistor;
- wherein:
- a noise figure of the differential input stage is less than 3 dB;
- a product of an impedance between the first and second emitter multiplied by a tail current is such that a high 3rd order input intercept point is 118 dBμV;
- and power consumption of the differential input stage is ⅕ relative to another differential input stage with the high dynamic range and an emitter degeneration component that includes two resistors connected between differential transistors and a current source.
A double balanced mixer for an RF front-end part of a wide-band receiver, comprising:
- a lower stage including a low-power high dynamic range input stage that includes first and second differential input transistors connected to a differential input signal, each transistor having an internal base resistance of Rb and a small signal emitter resistance of re;
- a first and second collector resistor respectively coupled to a first and second collector of the first and second differential transistor;
- and
- an emitter degeneration component that is connected between a first and second emitter, respectively, of the first and second differential transistor, wherein:
- i. the emitter degeneration component comprises a first and second variable capacitance diode biased at a fixed 0 V DC level, connected back-to- back in series with each other and respectively connected to the first and second emitter via a first and second fixed series capacitor;
- and
- ii. the first and second collector resistor each have a value of 100ω to avoid parasitic oscillations.
A method for manufacturing a low power consumption and high dynamic range differential input stage, comprising the steps of:
- providing a first and second differential input transistor each having an internal base resistance of Rb and a small signal emitter resistance of re;
- connecting the provided first and second differential input transistor to a first and second differential input signal;
- connecting a first and second collector resistor respectively to a first and second collector of the first and second differential transistor;
- providing an emitter degeneration component by providing a capacitor that contributes no noise to the input stage;
- and calculating the contribution to the noise level of the input stage as the sum of the two base resistors Rb and two times half the small signal emitter resistance of re;
- and
- connecting the emitter degeneration component between a first and second emitter, respectively, of the first and second differential transistor, wherein emitter degeneration component is configured and arranged without a resistor between the first and second emitter,
- wherein:
- a noise figure is less than 3 dB;
- the product of an impedance between the first and second emitter multiplied by a tail current is such that a high 3rd order input intercept point is 118 dBμV.
A method for manufacturing a low power consumption and high dynamic range differential input stage, comprising the steps of:
- providing a first and second differential input amplification component, wherein the first and second differential input amplification component is a field effect transistor FET having an internal gate series resistance Rg and a small signal source resistance rs, wherein rs is 1/gm and gm is the transconductance of the FET;
- and further comprising the steps of:
- a. connecting a first and second drain resistor respectively to a first and second drain of the first and second FET;
- b. connecting the noiseless degeneration component between a first and second source, respectively, of the first and second FET, and c. calculating the contribution to the noise level of the input stage as the sum of the two internal gate series resistors Rg and two times the small signal source resistance of rs;
- connecting the provided first and second differential input amplification component to a differential input signal;
- and
- connecting a noiseless component between the first and second differential input amplifier component to achieve a predictable gain,
- wherein:
- a noise figure of the input stage is less than 5 dB;
- the product of an impedance between the first and second source multiplied by a tail current is such that a high 3rd order input intercept point is higher than 118 dBμV.
Dependencies are inferred from the claim text.