# US 8,151,221 B2 · Method to compensate optical proximity correction

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- Number: US 8,151,221 B2
- Document ID: US8151221B2
- Status: Granted
- Kind: B2
- Application number: 12/769,873
- Filed: 2010-04-29
- Published: 2011-11-03
- Granted: 2012-04-03
- Earliest claimed: 2010-04-29
- Assignees: United Microelectronics Corp.
- Inventors: Chun-Hsien Huang; Ming-Jui Chen; Te-Hung Wu; Yu-Shiang Yang
- Web page: https://patentgrep.com/patent/US8151221B2

## CPC

- G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36)
- G03F 1/36: Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
- G03F 1/70: Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
- G03F 7/70441: {Optical proximity correction [OPC]}
- G06F 2119/18: Manufacturability analysis or optimisation for manufacturability
- Y02P 90/02: Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

A method to compensate optical proximity correction adapted for a photolithography process is provided. An integrated circuit (IC) layout firstly is provided. The IC layout includes active regions and a shallow trench isolation (STI) region. The STI region is a region except the active regions. The IC layout further includes ion implant regions which are overlapped with a part of the STI region and at least a part of the active regions. Subsequently, at least a photoresist line width compensation region is acquired in a photoresist covering region outside the ion implant regions according to the IC layout. Each photoresist line width compensation region is disposed in the STI region. Afterwards, the IC layout is corrected according to a width of the photoresist line width compensation region, a length of a side of the active region facing a side of the photoresist line width compensation region and a distance from the side of the photoresist line width compensation region to the active region facing the side. Finally, the corrected IC layout is transferred to a photomask.

## Claims

### Claim 1

A method to compensate optical proximity correction, adapted for a photolithography process and comprising:
providing an integrated circuit layout, wherein the integrated circuit layout comprises a plurality of active regions and a shallow trench isolation region, the shallow trench isolation region is a region except the active regions, and the integrated circuit layout further comprises a plurality of ion implant regions overlapped with the shallow trench isolation region and at least a part of the active regions;
acquiring at least a photoresist line width compensation region from a photoresist covering region outside the ion implant regions according to the integrated circuit layout, wherein the photoresist line width compensation region each is disposed in the shallow trench isolation region;
correcting the integrated circuit layout according to a width of the photoresist line width compensation region, a length of a side of the active region facing a side of the photoresist line width compensation region, and a distance between the side of the photoresist line width compensation region and the active region facing the side of the photoresist line width compensation region; and
transferring the corrected integrated circuit layout to a photomask.

### Claim 2 (depends on 1)

The method to compensate optical proximity correction as claimed in claim 1, wherein the width of the photoresist line width compensation region is smaller than 500 nm.

### Claim 3 (depends on 1)

The method to compensate optical proximity correction as claimed in claim 1, wherein a width of the ion implant region disposed at the side of the photoresist line width compensation region is larger than 700 nm.

### Claim 4 (depends on 1)

The method to compensate optical proximity correction as claimed in claim 1, wherein the step of correcting the integrated circuit layout comprises:
selecting a proper look-up table from a plurality of look-up tables according to the length of the side of the active region facing the side of the photoresist line width compensation region;
obtaining a correction value for the photoresist line width compensation region by inquiring the selected look-up table according to the width of the photoresist line width compensation region and the distance from the side of the photoresist line width compensation region to the active region facing the side of the photoresist line width compensation region; and
correcting the integrated circuit layout according to the correction value.

### Claim 5 (depends on 4)

The method to compensate optical proximity correction as claimed in claim 4, wherein the look-up tables comprise a first look-up table, a second look-up table and a third look-up table, the first look-up table is selected when the length of the side of the active region facing the side of the photoresist line width compensation region is smaller than 300 nm, the second look-up table is selected when the length of the side of the active region facing the side of the photoresist line width compensation region falls into the range from 300 nm to 600 nm, and the third look-up table is selected when the length of the side of the active region facing the side of the photoresist line width compensation region is larger than 600 nm.
