# US 8,151,166 B2 · Reduction of back pattern dependency effects in memory devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,151,166 B2 - Document ID: US8151166B2 - Status: Granted - Kind: B2 - Application number: 12/037,487 - Filed: 2008-02-26 - Published: 2008-09-11 - Granted: 2012-04-03 - Earliest claimed: 2007-01-24 - Assignees: Anobit Technologies Ltd. - Inventors: Ofir Shalvi; Zeev Cohen - Web page: https://patentgrep.com/patent/US8151166B2 ## CPC - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 11/5628: {Programming or writing circuits; Data input circuits} - G11C 16/10: Programming or data input circuits - G11C 16/3418: {Disturbance prevention or evaluation; Refreshing of disturbed memory data} - G11C 16/3427: {Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written} - G11C 16/3495: {Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically} - G11C 27/005: {with non-volatile charge storage, e.g. on floating gate or MNOS} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A method for operating a memory that includes multiple analog memory cells includes storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels. After storing the data, second storage values are read from at least some of the cells, including at least one interfered cell that belongs to a group of cells. A Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell is detected and canceled. The second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, are processed so as to reconstruct the data. ## Claims ### Claim 1 A method for operating a memory that includes multiple analog memory cells, the method comprising: storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels; after storing the data, reading second storage values from at least some of the cells, including at least one interfered cell that belongs to a group of cells; detecting and canceling a Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell; and processing the second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, so as to reconstruct the data, wherein detecting and canceling the BPD distortion comprise recursively estimating a part of the BPD distortion in a given cell in the group based on one or more other parts of the BPD distortion in respective one or more cells in the group that were programmed earlier than the given cell, and on the second storage values that were read from the one or more cells, and wherein estimating the part of the BPD distortion comprises measuring a total BPD distortion that is caused by the cells in the group, and estimating the part of the BPD distortion based on the total BPD distortion. ### Claim 2 (depends on 1) The method according to claim 1, wherein the analog memory cells comprise NAND Flash cells, and wherein the group of cells comprises a NAND string. ### Claim 3 (depends on 1) The method according to claim 1, wherein detecting and canceling the BPD distortion comprise evaluating a condition indicating that the interfered cell is likely to be subject to the BPD distortion, and canceling the BPD distortion responsively to the evaluated condition. ### Claim 4 (depends on 3) The method according to claim 3, wherein storing the data comprises encoding the data with an error detection code, and wherein evaluating the condition comprises decoding the error detection code and identifying a data error using the decoded error detection code. ### Claim 5 (depends on 3) The method according to claim 3, wherein reading the second storage values comprises processing the read second storage values so as to identify one or more over-programmed cells among the memory cells in the memory, and wherein evaluating the condition comprises determining that the group of cells comprises at least one of the over-programmed cells. ### Claim 6 (depends on 1) The method according to claim 1, wherein the cells in the group are connected in series to one another, and wherein measuring the total BPD distortion comprises applying pass voltages to respective gates of the cells in the group and measuring a current flowing through the cells responsively to the applied pass voltages. ### Claim 7 (depends on 1) The method according to claim 1, wherein the cells in the group are connected in series to one another, wherein reading the second storage value from the interfered cell comprises applying a read voltage to a gate of the interfered cell, applying pass voltages to respective gates of the other cells in the group and measuring a current flowing through the cells responsively to the applied read voltage and pass voltages, and wherein canceling the BPD distortion comprises increasing at least one of the pass voltages and reading the second storage value from the interfered cell using the increased pass voltages. ### Claim 8 (depends on 7) The method according to claim 7, wherein increasing the pass voltages comprises increasing the pass voltages of only a subset of the cells in the group that were programmed later than the interfered cell. ### Claim 9 (depends on 7) The method according to claim 7, wherein increasing the pass voltages comprises increasing the pass voltages iteratively until meeting a condition indicating that the BPD distortion is canceled. ### Claim 10 (depends on 9) The method according to claim 9, wherein increasing the pass voltages comprises storing the pass voltages for which the condition was met, and applying the stored pass voltages when performing a subsequent read operation on the group of cells. ### Claim 11 (depends on 7) The method according to claim 7, and comprising, after reading the second storage value from the interfered cell using the increased pass voltages, copying the data stored in the group to another group of the memory cells. ### Claim 12 (depends on 7) The method according to claim 7, wherein reading the second storage value from the interfered cell comprises reading the second storage value multiple times while applying respective different values of the pass voltages to the gates of the other cells in the group, and wherein canceling the BPD distortion comprises selecting one of the read second storage values having a lowest level of the BPD distortion. ### Claim 13 (depends on 1) The method according to claim 1, wherein detecting the BPD distortion comprises measuring shifts in one or more of the second storage values read from a subset of the cells in the group, which occurred after the cells were programmed, and estimating the BPD distortion responsively to the measured shifts. ### Claim 14 (depends on 1) The method according to claim 1, wherein storing the data comprises encoding the data with an Error Correction Code (ECC), wherein canceling the BPD distortion comprises computing metrics for decoding the ECC based on the detected BPD distortion, and wherein processing the second storage values so as to reconstruct the data comprises decoding the ECC responsively to the metrics. ### Claim 15 (depends on 1) The method according to claim 1, wherein reading the second storage values comprises processing the read second storage values so as to identify one or more over-programmed cells among the memory cells in the memory and storing information regarding the identified over-programmed cells, and wherein canceling the BPD distortion comprises processing the stored information regarding the over-programmed cells with regard to the read second storage values so as to cancel the BPD distortion. ### Claim 16 (depends on 15) The method according to claim 15, wherein processing the stored information comprises estimating the BPD distortion based on the stored information and subtracting the estimated BPD distortion from the second storage value read from the interfered cell. ### Claim 17 (depends on 15) The method according to claim 15, wherein storing the data comprises encoding the data with an Error Correction Code (ECC), wherein processing the stored information comprises calculating metrics for decoding the ECC based on the stored information, and wherein processing the second storage values so as to reconstruct the data comprises decoding the ECC responsively to the metrics. ### Claim 18 A method for operating a memory that includes multiple analog memory cells, the method comprising: storing data in the memory by writing first storage values to the cells, so as to cause the cells to hold respective electrical charge levels; after storing the data, reading second storage values from at least some of the cells, including at least one interfered cell that belongs to a group of cells; detecting and canceling a Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell; and processing the second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, so as to reconstruct the data, wherein the cells in the group are connected in series to one another, wherein reading the second storage value from the interfered cell comprises applying a read voltage to a gate of the interfered cell, applying pass voltages to respective gates of the other cells in the group and measuring a current flowing through the cells responsively to the applied read voltage and pass voltages, and wherein canceling the BPD distortion comprises reducing at least one of the pass voltages while not violating a predefined performance criterion, and reading the second storage value from the interfered cell using the reduced pass voltages. ### Claim 19 A data storage apparatus, comprising: an interface, which is operative to communicate with a memory that includes multiple analog memory cells; and a processor, which is coupled to store data in the memory by writing first storage values to the cells so as to cause the cells to hold respective electrical charge levels, to read, after storing the data, second storage values from at least some of the cells, including at least one interfered cell that belongs to a group of cells, to detect and cancel a Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell, and to process the second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, so as to reconstruct the data, wherein the processor is coupled to recursively estimate a part of the BPD distortion in a given cell in the group based on one or more other parts of the BPD distortion in one or more cells in the group that were programmed earlier than the given cell, and on the second storage values that were read from the one or more cells, and to estimate the part of the BPD distortion by measuring a total BPD distortion that is caused by the cells in the group, and estimating the part of the BPD distortion based on the total BPD distortion. ### Claim 20 (depends on 19) The apparatus according to claim 19, wherein the analog memory cells comprise NAND Flash cells, and wherein the group of cells comprises a NAND string. ### Claim 21 (depends on 19) The apparatus according to claim 19, wherein the processor is coupled to evaluate a condition indicating that the interfered cell is likely to be subject to the BPD distortion, and to cancel the BPD distortion responsively to the evaluated condition. ### Claim 22 (depends on 21) The apparatus according to claim 21, wherein the processor is coupled to encode the data with an error detection code and to decode the error detection code when reconstructing the data, and wherein the condition checks whether a data error is identified by the decoded error detection code. ### Claim 23 (depends on 21) The apparatus according to claim 21, wherein the processor is coupled to process the read second storage values so as to identify one or more over-programmed cells among the memory cells in the memory, and wherein the condition checks whether the group of cells comprises at least one of the over-programmed cells. ### Claim 24 (depends on 19) The apparatus according to claim 19, wherein the cells in the group are connected in series to one another, and wherein the processor is coupled to measure the total BPD distortion by applying pass voltages to respective gates of the cells in the group and measuring a current flowing through the cells responsively to the applied pass voltages. ### Claim 25 (depends on 19) The apparatus according to claim 19, wherein the cells in the group are connected in series to one another, wherein the processor is coupled to read the second storage value from the interfered cell by applying a read voltage to a gate of the interfered cell, applying pass voltages to respective gates of the other cells in the group and measuring a current flowing through the cells responsively to the applied read voltage and pass voltages, and to cancel the BPD distortion by increasing at least one of the pass voltages and reading the second storage value from the interfered cell using the increased pass voltages. ### Claim 26 (depends on 25) The apparatus according to claim 25, wherein the processor is coupled to increase the pass voltages of only a subset of the cells in the group that were programmed later than the interfered cell. ### Claim 27 (depends on 25) The apparatus according to claim 25, wherein the processor is coupled to increase the pass voltages iteratively until meeting a condition indicating that the BPD distortion is canceled. ### Claim 28 (depends on 27) The apparatus according to claim 27, wherein the processor is coupled to store the pass voltages for which the condition was met, and to apply the stored pass voltages when performing a subsequent read operation on the group of cells. ### Claim 29 (depends on 25) The apparatus according to claim 25, wherein the processor is coupled to copy the data stored in the group to another group of the memory cells after reading the second storage value from the interfered cell using the increased pass voltages. ### Claim 30 (depends on 25) The apparatus according to claim 25, wherein the processor is coupled to read the second storage value from the interfered cell multiple times while applying respective different values of the pass voltages to the gates of the other cells in the group, and to select one of the read second storage values having a lowest level of the BPD distortion. ### Claim 31 (depends on 19) The apparatus according to claim 19, wherein the processor is coupled to process the read second storage values so as to identify one or more over-programmed cells among the memory cells in the memory, to store information regarding the identified over-programmed cells, and to process the stored information regarding the over-programmed cells with regard to the read second storage values so as to cancel the BPD distortion. ### Claim 32 (depends on 31) The apparatus according to claim 31, wherein the processor is coupled to estimate the BPD distortion based on the stored information and to subtract the estimated BPD distortion from the second storage value read from the interfered cell. ### Claim 33 (depends on 31) The apparatus according to claim 31, wherein the processor is coupled to encode the data with an Error Correction Code (ECC), to calculate metrics for decoding the ECC based on the stored information, and to decode the ECC responsively to the metrics. ### Claim 34 (depends on 19) The apparatus according to claim 19, wherein the processor is coupled to measure shifts in one or more of the second storage values read from a subset of the cells in the group, which occurred after the cells were programmed, and to estimate the BPD distortion responsively to the measured shifts. ### Claim 35 (depends on 19) The apparatus according to claim 19, wherein the processor is coupled to encode the data with an Error Correction Code (ECC), to compute metrics for decoding the ECC based on the detected BPD distortion, and to decode the ECC responsively to the metrics so as to reconstruct the data. ### Claim 36 A data storage apparatus, comprising: an interface, which is operative to communicate with a memory that includes multiple analog memory cells; and a processor, which is coupled to store data in the memory by writing first storage values to the cells so as to cause the cells to hold respective electrical charge levels, to read, after storing the data, second storage values from at least some of the cells, including at least one interfered cell that belongs to a group of cells, to detect and cancel a Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell, and to process the second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, so as to reconstruct the data, wherein the cells in the group are connected in series to one another, wherein the processor is coupled to read the second storage value from the interfered cell by applying a read voltage to a gate of the interfered cell, applying pass voltages to respective gates of the other cells in the group and measuring a current flowing through the cells responsively to the applied read voltage and pass voltages, and to cancel the BPD distortion by reducing at least one of the pass voltages while not violating a predefined performance criterion, and reading the second storage value from the interfered cell using the reduced pass voltages. ### Claim 37 A data storage apparatus, comprising: a memory, which comprises multiple analog memory cells; and a processor, which is coupled to store data in the memory by writing first storage values to the cells so as to cause the cells to hold respective electrical charge levels, to read, after storing the data, second storage values from at least some of the cells, including at least one interfered cell that belongs to a group of cells, to detect and cancel a Back Pattern Dependency (BPD) distortion caused by the electrical charge levels of one or more interfering cells in the group to at least one of the second storage values read from the at least one interfered cell, and to process the second storage values, including the at least one of the second storage values in which the BPD distortion was canceled, so as to reconstruct the data, wherein the processor is coupled to recursively estimate a part of the BPD distortion in a given cell in the group based on one or more other parts of the BPD distortion in one or more cells in the group that were programmed earlier than the given cell, and on the second storage values that were read from the one or more cells, and to estimate the part of the BPD distortion by measuring a total BPD distortion that is caused by the cells in the group, and estimating the part of the BPD distortion based on the total BPD distortion.