Encoding device, decoding device, encoding/decoding device, and recording/reproducing device

An encoding/decoding device, comprising:

• an ECC encoder which interleaves a data string into n (n≧2) blocks of data strings at every m (m≧2) bits, generates a first error correction code parity from the data string of each of said interleaved blocks, and adds said first error correction code parity of each block to said data string to create an error correction code word;
• a parity encoder which creates a parity bit at every plurality of bits of said error correction code word, and adds the parity bit to said error correction code word;
• a second ECC encoder which divides a second error correction code word in which a parity generated by said parity encoder is added to said error correction code word, into L (L≧2) number of blocks of data strings at every K (K≧2) bits, generates a second error correction code parity, which is a linear code, in said block units, from the data string of each block, and adds said second error correction code parity of each block to said second error correction code word to create a third error correction code word;
• an iterative decoder which iteratively decodes the received encoded data string using the second ECC code parity, decodes said encoded data string into a bit string, and outputs likelihood of each bit;
• and
• an ECC decoding circuit which iteratively performs error correction decoding based on the first error correction code of the encoded data string of said iterative decoder, and said encoded bit string correction decoding based on said likelihood according to error detection based on said parity bit.

A recording/reproducing device, comprising:

• a head which writes and reads data to/from a storage medium;
• an ECC encoder which interleaves a data string to be written to the storage medium into n (n≧2) blocks of data strings at every m (m≧2) bits, generates a first error correction code parity from the data string of each of said interleaved blocks, and adds said first error correction code parity of each block to said data string to create an error correction code word;
• a parity encoder which creates a parity bit at every plurality of bits of said error correction code word, and adds the parity bit to said error correction code word;
• a second ECC encoder which divides a second error correction code word in which a parity generated by said parity encoder is added to said error correction code word, into L (L≧2) number of blocks of data strings at every K (K≧2) bits, generates a second error correction code parity, which is a linear code, in said block units, from the data string of each block, and adds said second error correction code parity of each block to said second error correction code word to create a third error correction code word, and outputs the third error correction code word to said head;
• an iterative decoder which iteratively decodes said encoded data string read by said head, using the second ECC code parity, decodes said encoded data string into a bit string, and outputs likelihood of each bit;
• and
• an ECC decoding circuit which iteratively performs error correction decoding based on the first error correction code of the encoded data string of said iterative decoder, and said encoded bit string correction decoding based on said likelihood according to error detection based on said parity bit.