# US 8,148,915 B2 · Electronic ballast device and operation method thereof

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- Number: US 8,148,915 B2
- Document ID: US8148915B2
- Status: Granted
- Kind: B2
- Application number: 12/551,924
- Filed: 2009-09-01
- Published: 2011-03-03
- Granted: 2012-04-03
- Earliest claimed: 2009-09-01
- Assignees: inergy Technology Inc.
- Inventors: Ching-Piao Chen
- Web page: https://patentgrep.com/patent/US8148915B2

## CPC

- H05B 41/295: with semiconductor devices and specially adapted for lamps with preheating electrodes, e.g. for fluorescent lamps
- H05B 41/382: {during the transitional start-up phase}
- H05B: ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL

## Abstract

An electronic ballast device includes a stabilizer and a sweep frequency circuit for preheating. The stabilizer includes a first input terminal, a second input terminal and an output terminal connected to a fluorescent lamp. The sweep frequency circuit includes a boost element, an impedance element, a switch and a frequency selective circuit. The boost element includes a first end and a second end separately electrically connected to the first input terminal and the impedance element. The switch includes an input terminal electrically connected to the common contact point of the boost element and the impedance element, an output terminal and a reference voltage input terminal electrically connected to the common contact point of the boost element and the stabilizer. Furthermore, the frequency selective circuit is electrically connected to the output terminal of the switch, the first input terminal of the stabilizer and the second input terminal of the stabilizer.

## Claims

### Claim 1

An electronic ballast device comprising:
a stabilizer comprising:
a first input terminal and a second input terminal;
an output terminal electrically connected to a fluorescent lamp; and
a power module for providing a working voltage to the first input terminal; and
a sweep frequency circuit comprising:
a boost element comprising a first end electrically connected to the first input terminal and a second end;
an impedance element comprising a first end electrically connected to the second end of the boost element and a second end;
a switch comprising an input terminal electrically connected to the second end of the boost element and the first end of the impedance element, an output terminal and a reference voltage input terminal electrically connected to the first end of the boost element and the first input terminal of the stabilizer; and
a frequency selective circuit electrically connected to the output terminal of the switch, the first input terminal of the stabilizer and the second input terminal of the stabilizer.

### Claim 2 (depends on 1)

The electronic ballast device of claim 1, wherein the switch further comprises:
a NPN BJT comprising a base, a collector and an emitter;
a diode comprising a P terminal and an N terminal electrically connected to the base of the NPN BJT; and
a base resistor comprising a first end electrically connected to the P terminal of the diode and a second end electrically connected to the first end of the impedance element and the second end of the boost element.

### Claim 3 (depends on 2)

The electronic ballast device of claim 2, wherein the frequency selective circuit comprises:
a capacitance comprising a first end and a second end;
a first resistance comprising a first end electrically connected to the first end of the capacitance and a second end electrically connected to the emitter of the NPN BJT; and
a second resistance comprising a first end electrically connected to the collector of the NPN BJT and the first input terminal of the stabilizer and a second end electrically connected to the first end of the capacitance and the second input terminal of the stabilizer.

### Claim 4 (depends on 1)

The electronic ballast device of claim 1, wherein the switch comprises:
a NMOS transistor comprising a gate, a drain and a source; and
a diode comprising a P terminal electrically connected to the first end of the impedance element and the second end of the boost element and an N terminal electrically connected to the gate of the NMOS transistor.

### Claim 5 (depends on 4)

The electronic ballast device of claim 4, wherein the frequency selective circuit comprises:
a capacitance comprising a first end and a second end;
a first resistance comprising a first end electrically connected to the first end of the capacitance and a second end electrically connected to the source of the NMOS transistor; and
a second resistance comprising a first end electrically connected to the drain of the NMOS transistor and a second end electrically connected to the first end of the capacitance and the second input terminal of the stabilizer.

### Claim 6 (depends on 1)

The electronic ballast device of claim 1, wherein the boost element comprises a capacitance.

### Claim 7 (depends on 1)

The electronic ballast device of claim 1, wherein the impedance element comprises a resistance.

### Claim 8

An operation method for an electronic ballast device, the method comprising:
providing a stabilizer comprising a first input terminal, a second input terminal and an output terminal electrically connected to a fluorescent lamp, wherein the stabilizer further comprises a power module for providing a working voltage to the first input terminal;
providing a boost element comprising a first end electrically connected to the first input terminal of the stabilizer and a second end;
providing an impedance element comprising a first end electrically connected to the second end of the boost element and a second end;
providing a switch comprising an input terminal electrically connected to the second end of the boost element and the first end of the impedance element, an output terminal and a reference voltage input terminal electrically connected to the first end of the boost element and the first input terminal of the stabilizer; and
providing a frequency selective circuit electrically connected to the output terminal of the switch, the first input terminal of the stabilizer and the second input terminal of the stabilizer;
wherein the stabilizer charges the first end of the boost element through the first input terminal of the stabilizer, so as to make the second end of the boost element generate a couple voltage to turn on the switch and then the frequency selective circuit provides a first oscillating frequency to the stabilizer, and wherein the frequency selective circuit provides a second oscillating frequency to the stabilizer when the boost element is charged to a steady voltage.

### Claim 9 (depends on 8)

The operation method of claim 8, wherein the first oscillating frequency ranges from 90 KHz to 110 KHz.

### Claim 10 (depends on 8)

The operation method of claim 8, wherein the second oscillating frequency ranges from 45 KHz to 50 KHz.

### Claim 11 (depends on 8)

The operation method of claim 8, wherein the switch further comprises:
a NPN BJT comprising a base, a collector and an emitter;
a diode comprising a P terminal and an N terminal electrically connected to the base of NPN BJT; and
a base resistor comprising a first end electrically connected to the P terminal of the diode and a second end electrically connected to the first end of the impedance element and the second end of the boost element.

### Claim 12 (depends on 11)

The operation method of claim 11, wherein the frequency selective circuit comprises:
a capacitance comprising a first end and a second end;
a first resistance comprising a first end electrically connected to the first end of the capacitance and a second end electrically connected to the emitter of the NPN BJT; and
a second resistance comprising a first end electrically connected to the collector of the NPN BJT and the first input terminal of the stabilizer, and a second end electrically connected to the first end of the capacitance and the second input terminal of the stabilizer.

### Claim 13 (depends on 12)

The operation method of claim 12, further comprising:
determining the first oscillating frequency based on the first resistance, the second resistance and the capacitance.

### Claim 14 (depends on 12)

The operation method of claim 12, further comprising:
determining the second oscillating frequency based on the second resistance and the capacitance.

### Claim 15 (depends on 8)

The operation method of claim 8, wherein the switch further comprises:
a NMOS transistor comprising a gate, a drain and a source; and
a diode comprising a P terminal electrically connected to the first end of the impedance element and the second end of the boost element, and an N terminal electrically connected to the gate of the NMOS transistor.

### Claim 16 (depends on 15)

The operation method of claim 15, wherein the switch further comprises:
a capacitance comprising a first end and a second end;
a first resistance comprising a first end electrically connected to the first end of the capacitance and a second end electrically connected to the source of the NMOS transistor; and
a second resistance comprising a first end electrically connected to the drain of the NMOS transistor and a second end electrically connected to the first end of the capacitance and the second input terminal of the stabilizer.

### Claim 17 (depends on 16)

The operation method of claim 16, further comprising:
determining the first oscillating frequency based on the first resistance, the second resistance and the capacitance.

### Claim 18 (depends on 16)

The operation method of claim 16, further comprising:
determining the second oscillating frequency based on the second resistance and the capacitance.

### Claim 19 (depends on 8)

The operation method of claim 8, wherein the boost element comprises a capacitance.

### Claim 20 (depends on 8)

The operation method of claim 8, wherein the impedance element comprises a resistance.
