# US 8,148,798 B2 · Semiconductor device and method for manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,148,798 B2 - Document ID: US8148798B2 - Status: Granted - Kind: B2 - Application number: 12/205,495 - Filed: 2008-09-05 - Published: 2009-01-01 - Granted: 2012-04-03 - Earliest claimed: 2006-03-08 - Assignees: Fujitsu Semiconductor Limited - Inventors: Takahiro Yamagata - Web page: https://patentgrep.com/patent/US8148798B2 ## CPC - H10D 88/00: Three-dimensional [3D] integrated devices - H10B 53/40: characterised by the peripheral circuit region - H10D 1/682: {having dielectrics comprising perovskite structures} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10D 88/01: {Manufacture or treatment} - H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers} - H10W 20/075: {of multilayered thin functional dielectric layers} - H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)} - H10W 20/096: {by contacting with gases, liquids or plasmas} - H10W 20/097: {by thermally treating} - H10W 20/42: Vias, e.g. via plugs - H10W 72/019: {of bond pads} - H10W 72/01231: {using blanket deposition} - H10W 72/01251: {Changing the shapes of bumps} - H10W 72/29: Bond pads specially adapted therefor - H10W 72/9232: {with additional elements interposed between layers} - H10W 72/932: {Plan-view shape, i.e. in top view} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 72/983: {Reinforcing structures, e.g. collars} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10B: ELECTRONIC MEMORY DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The semiconductor device includes a capacitor 36 formed over a semiconductor substrate 10 and including a lower electrode 30, a dielectric film 32 and an upper electrode 34; a first insulation film 58 formed above the capacitor 36; a first interconnection 88a formed over the first insulation film 68; a second insulation film 90 formed over the first insulation film 68 and over the first interconnection 88a; an electrode pad 102 formed over the second insulation film 90: and a monolithic conductor 100 buried in the second insulation film 90 immediately below the electrode pad 102 and buried through the second insulation film 90 down to a part of at least the first insulation layer 68. ## Claims ### Claim 1 A semiconductor device comprising: a capacitor formed over a semiconductor substrate and including a lower electrode, a dielectric film formed over the lower electrode and an upper electrode formed over the dielectric film; a first insulation film formed over the capacitor; a first interconnection formed over the first insulation film; a second insulation film formed over the first insulation film and over the first interconnection; an electrode pad formed over the second insulation film; an opening formed continuously in the second insulation film and in the first insulation film below the electrode pad, the second insulation film and the first insulation film being penetrated by the opening; and a conductor plug buried in the opening, a length of the conductor plug being larger than at least a thickness of the second insulation film, and a diameter of the conductor plug being larger than a diameter of another conductor plug connected to the first interconnection. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, further comprising: a third insulation film formed over the semiconductor substrate, burying the capacitor; and a second interconnection and a conduction film formed over the third insulation film, the electrode pad being connected to the conduction film through the second insulation film and the first insulation film. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, further comprising a conduction film formed below the electrode pad and formed of one and the same conductor film as the upper electrode or the lower electrode of the capacitor, the electrode pad being connected to the conduction film through the second insulation film and the first insulation film. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, further comprising: an insulation layer formed over the semiconductor substrate below the electrode pad; and a conduction film formed over the insulation film, the electrode pad being connected to the conduction film through the second insulation film and the first insulation film. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the conductor is formed of Cu, Au, Al or Al—Cu alloy. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, further comprising a barrier film formed above the capacitor, for preventing the diffusion of hydrogen and water. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein the barrier film is flat. ### Claim 8 (depends on 6) The semiconductor device according to claim 6, wherein the barrier film is formed of aluminum oxide or titanium oxide. ### Claim 9 (depends on 1) The semiconductor device according to claim 1, wherein the dielectric film of the capacitor is formed of a ferroelectric or a high dielectric. ### Claim 10 (depends on 9) The semiconductor device according to claim 9, wherein the dielectric film of the capacitor is PbZr1-XTiXO3 film, Pb1-XLaXZr1-YTiYO3 film, SrBi2(TaXNb1-X)2O9 film or Bi4Ti2O12 film.