Method of evaluating an architecture for an integrated circuit device

A method of evaluating an architecture for an integrated circuit device having a plurality of different types of programmable elements, the method comprising:

• generating a predefined library of primitives, which are based upon the plurality of different types of programmable elements, for a predetermined architecture;
• transforming a first dataflow program into an intermediate format;
• transforming the intermediate format to a second dataflow program defined in terms of the predefined library of primitives for the predetermined architecture;
• recording computational steps in implementing the second dataflow program defined in terms of the predefined library of primitives during a simulation of the second dataflow program defined in terms of the predefined library of primitives for the predetermined architecture;
• and
• generating, by using a computer, an implementation profile comprising information related to the implementation of the first dataflow program in an integrated circuit having the predetermined architecture using the recorded computational steps in the implementation of the second dataflow program defined in terms of the predefined library of primitives and resource requirements of the primitives.

A computer program product enabling evaluating an architecture for an integrated circuit device having a plurality of different types of programmable elements, the computer program product implemented in a non-transitory computer-readable medium comprising:

• computer-readable program code that generates a library of primitives for a predetermined architecture based upon the plurality of different types of programmable elements;
• computer-readable program code that converts a first dataflow program into an intermediate format;
• computer-readable program code that converts the intermediate format to a second dataflow program defined in terms of the predetermined library of primitives;
• computer-readable program code that determines dependencies between computational steps when implementing the second dataflow program during simulation of the second dataflow program for the predetermined architecture;
• and
• computer-readable program code that generates an implementation profile comprising information related to the implementation of the first dataflow program in an integrated circuit having the predetermined architecture based on the determining of the dependencies and resource requirements of the primitives.