Circuit for and method of minimizing power consumption in an integrated circuit device

A method of minimizing power consumption in a device, the method comprising:

• providing a plurality of circuit blocks having circuits for performing functions, wherein each circuit block consumes power in a static state;
• generating, by a power control circuit, a plurality of power control signals, each power control signal controlling an operating voltage of the plurality of operating voltages applied to a plurality of circuit blocks;
• coupling a first operating voltage of a plurality of operating voltages to each circuit block of a first set of circuit blocks;
• coupling a second operating voltage of the plurality of operating voltages to each circuit block of a second set of circuit blocks;
• and
• disabling, by a power control signal of the plurality of power control signals, at least a portion enabling a predetermined function of circuit blocks of the first set of circuit blocks and the second set of circuit blocks if corresponding enable signals associated with the portions enabling the predetermined function and stored in memory elements of the device indicate that the portions enabling the predetermined function of the circuit blocks are to participate in a power reduction mode.

A circuit for minimizing power consumption in a device, the circuit comprising:

• a plurality of circuit blocks having circuits for performing functions, wherein each circuit block consumes power in a static state;
• a plurality of operating voltages, wherein each circuit block of the plurality of circuit blocks is adapted to receive an operating voltage of the plurality of operating voltages, wherein a first set of circuit blocks of the plurality of circuit blocks receives a first operating voltage and a second set of circuit blocks of the plurality of circuit blocks receives a second operating voltage;
• and
• a power control circuit coupled to the plurality of circuit blocks for coupling one of a plurality of power control signals to each circuit block of the plurality of circuit blocks, wherein the one of the plurality of power control signals is coupled to a portion enabling a predetermined function of circuit blocks of the first set of circuit blocks and the second set of circuit blocks, and the portions enabling a predetermined function of the circuit blocks of the first set of circuit blocks and the second set of circuit blocks are disabled if corresponding enable signals associated with the portions and stored in memory elements of the device indicate that the portions are to participate in a power reduction mode.