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US 8,145,856 B1Granted
Multithreading implementation for register files
AssigneeMarvell Israel (M.I.S.L) Ltd.
InventorEitan Rosen
Life of this patent
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Abstract
A processor circuit including a register file system that has a number of register file elements. Each of the register file elements has an input/output port, a register file cell, and a special memory element. The register file cell and the special memory element are clocked by an advance thread signal. Data stored in the register file cell propagates to the special memory element according to the advance thread signal. In this manner, state information for multiple threads may be stored.
Claims8
A processor circuit including a register file system, comprising:
- a plurality of register file elements, wherein ones of the plurality of register file elements include:
- an input/output port;
- a register file cell coupled to the input/output port, wherein the register file cell is configured to communicate first data via the input/output port and to store the first data, wherein the register file cell is configured to receive an input signal, and wherein the register file cell is configured to generate an output signal;
- and
- a special memory element that is configured to receive the output signal from the register file cell, to store second data, and to generate a second output signal,
- wherein the register file cell is configured to receive the second output signal as the input signal,
- wherein the register file cell and the special memory element are clocked by an advance thread signal, and wherein the first data becomes the second data according to the advance thread signal.
4 more elements
Dependencies are inferred from the claim text.