Data interleaving circuit and method for vectorized turbo decoder
AssigneeMotorola Mobility LLC
InventorT. Keith Blankenship
Life of this patent
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Abstract
A data interleaving circuit and method for interleaving a data block comprising M windows of W values include an index generator for generating an intra-window index w and an inter-window permutation vector m having M elements and an inter-window permutation circuit operable to receive M data values having intra-window index w from a memory and further operable to reorder the M data values in accordance with the inter-window permutation vector m and output the reordered data values. The index generator includes a recursion circuit that generates the intra-window index w and inter-window permutation vector m in accordance with a permutation polynomial. In one application, the reordered data values are passed to M parallel processors of a turbo decoder.
Claims21
A method for interleaving a block of data comprising M windows of W values according to a degree n permutation polynomial Pn(x) of an index x in a signal processing system comprising M parallel processors, the method comprising:
- storing the block of data in an W×M array in a memory;
- for each index x in the range 0≦x<W:
- generating an intra-window index w(x) and a first inter-window value m(x) for an index x a first window, where Pn(x) =m(x)W+w(x);
- computing an inter-window permutation vector m of length M dependent upon the first inter-window value m(x);
- retrieving data values corresponding to the intra-window index w(x) from the memory;
- reordering the retrieved data values in accordance with the inter-window permutation vector m to produce reordered data values;
- and
- passing a reordered data value to each of the M parallel processors.
A data interleaving circuit operable to interleave a block of data comprising M windows of W values according to a degree n permutation polynomial P,n(x) of an index x in a signal processing system comprising M parallel processors, the circuit comprising:
- a memory configured to store the block of data in a W×M array in the memory;
- a first circuit configured to generate an intra-window index w(x) and a first inter-window index m(x) for an index x of a first window, where Pn(x) =m(x)W+w(x);
- a second circuit configured to generate an inter-window permutation vector m of length M dependent upon the first inter-window value m(x);
- a memory access controller operable to receive the intra-window index w(x) and retrieve the corresponding data values from the memory;
- and
- a permutation circuit configured to receive the data values having intra-window index w(x) from the memory, reorder the data values in accordance with the inter-window permutation vector m , and output the reordered data values to the M parallel processors.
Dependencies are inferred from the claim text.