Monobit based low cost high performance radar warning receiver
AssigneeBAE Systems Information and Electronic Systems Integration Inc.
InventorsJames M. Huggett, Kevin S. Bassett, Arthur J. Tardif
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Abstract
A radar warning receiver is implemented in low cost integrated circuit form utilizing only one analog component, namely a limiting amplifier. By taking the output of the limiting amplifier and utilizing monobit sampling of the output it has been found that one can provide an integrated circuit single chip radar warning receiver using delay correlation to extract frequency, amplitude and modulation type from signals at or below the noise level.
Claims28
A sensitive radar warning receiver for detecting the presence of a threat radar and the identity thereof, comprising:
- a limiting amplifier adapted to be coupled to an antenna and constituting an analog receiver element;
- and,
- all digital circuitry including a monobit sampling circuit coupled to the output of said limiting amplifier, and a threat radar signal detection and identification module coupled to the output of said monobit of sampling circuit for determining from the sample the existence of and identification of a threat radar that is illuminating said antenna, whereby but for the analog element all processing is done digitally to enable an integrated circuit chip implementation said signal detection and identification module including a delay correlator to provide delay correlation for detecting the presence of said threat radar based on the coherence of the incoming signal to said limiting amplifier, and further including a real-to-quadrature converter coupled to the output of said limiting amplifier, thereby to provide in-phase and quadrature components, said delay correlator including delay correlation of said in-phase and quadrature components and operating on data that has been quantized to a single bit.
A sensitive radar warning receiver for detecting the presence of a threat radar and the identity thereof, comprising:
- a limiting amplifier adapted to be coupled to an antenna and constituting an analog receiver element;
- and,
- all digital circuitry including a monobit sampling circuit coupled to the output of said limiting amplifier, and a threat radar signal detection and identification module coupled to the output of said monobit of sampling circuit for determining from the sample the existence of and identification of a threat radar that is illuminating said antenna, whereby but for the analog element all processing is done digitally to enable integrated circuit chip implementation, said limiting amplifier including a log video amplifier.
A sensitive radar warning receiver responsive to signals at said radar warning receiver at or below the background noise level thereof, comprising:
- a limiting amplifier and a monobit sampler for sampling the output of said limiting amplifier, the sampled output being coupled to a signal detection and identification module in the form a single integrated circuit chip for extracting amplitude, frequency and modulation type of a threat radar signal at the input to said limiting amplifier and further including a converter for converting said incoming threat radar signal into in-phase and quadrature components and wherein said signal detection and identification module performs a delay correlation of single, two level in-phase and quadrature data from which frequency and amplitude of said incoming threat radar signal can be extracted.
A method for detecting the existence and identity of an incoming threat radar signal, comprising the steps of:
- providing a radar warning receiver having a limiting amplifier having an in-phase and quadrature output;
- and,
- performing an autocorrelation process on a single bit, two level monobit sampled in-phase and quadrature output of the limiting amplifier to permit determination of both frequency and amplitude of the incoming threat radar signal, said frequency and amplitude permitting the determination of the existence of and identity of the threat radar signal.
Dependencies are inferred from the claim text.