US 8,138,839 B2 · Wideband CMOS gain stage

Abstract

A CMOS gain stage includes biasing circuitry configured to insure saturation of a subsequent stage without a source follower circuit. The CMOS gain stage is optionally powered by a supply voltage that is greater than a permitted supply voltage for a processes technology that is used to fabricate the CMOS gain stage. In order to protect CMOS devices within the CMOS gain stage, optional drain-to-bulk junction punch-through protection circuitry is disclosed. A variety of optional features can be implemented alone and/or in various combinations of one another. Optional features include process-voltage-temperature (“PVT”) variation protection circuitry, which renders a gain relatively independent of process, voltage, and/or temperature variations. Optional features further include bandwidth enhancement circuitry.

Claims11

Dependent claims

A gain stage, comprising:

an input stage including first and second input transistors and first and second feedback-controlled transistors, the input stage providing first and second input terminals to the gain stage;
an output stage including first and second output transistors and providing first and second output terminals;
a bias network, coupled between the input stage and the output stage, configured to bias the first and second feedback-controlled transistors of the input stage;
and
an output source follower, coupled to the output stage, configured to ensure saturation bias of an input stage of a subsequent gain stage coupled to the gain stage;
wherein the bias network is further configured such that a common mode voltage at output terminals of the output source follower is substantially equal to a common mode voltage at gate terminals of said first and second output transistors.

3 more elements

Dependencies are inferred from the claim text.

Wideband CMOS gain stage

Life of this patent

Wideband CMOS gain stage

Life of this patent

Abstract

Claims11